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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id d19-20020a05600c34d300b003a6125562e1sm10817457wmq.46.2023.01.23.05.36.03 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Jan 2023 05:36:03 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 09/26] hw/i2c/versatile_i2c: Replace VersatileI2CState -> ArmSbconI2CState Date: Mon, 23 Jan 2023 13:35:36 +0000 Message-Id: <20230123133553.2171158-10-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230123133553.2171158-1-peter.maydell@linaro.org> References: <20230123133553.2171158-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::335; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x335.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Philippe Mathieu-Daudé In order to rename TYPE_VERSATILE_I2C as TYPE_ARM_SBCON_I2C (the formal ARM naming), start renaming its state. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-id: 20230110082508.24038-3-philmd@linaro.org Signed-off-by: Peter Maydell --- include/hw/i2c/arm_sbcon_i2c.h | 3 +-- hw/i2c/versatile_i2c.c | 10 +++++----- 2 files changed, 6 insertions(+), 7 deletions(-) diff --git a/include/hw/i2c/arm_sbcon_i2c.h b/include/hw/i2c/arm_sbcon_i2c.h index f54d1e54135..0101422d9dc 100644 --- a/include/hw/i2c/arm_sbcon_i2c.h +++ b/include/hw/i2c/arm_sbcon_i2c.h @@ -21,8 +21,7 @@ #define TYPE_ARM_SBCON_I2C TYPE_VERSATILE_I2C typedef struct ArmSbconI2CState ArmSbconI2CState; -DECLARE_INSTANCE_CHECKER(ArmSbconI2CState, ARM_SBCON_I2C, - TYPE_ARM_SBCON_I2C) +DECLARE_INSTANCE_CHECKER(ArmSbconI2CState, ARM_SBCON_I2C, TYPE_ARM_SBCON_I2C) struct ArmSbconI2CState { /*< private >*/ diff --git a/hw/i2c/versatile_i2c.c b/hw/i2c/versatile_i2c.c index 52a650f45ee..ee095762e57 100644 --- a/hw/i2c/versatile_i2c.c +++ b/hw/i2c/versatile_i2c.c @@ -30,7 +30,7 @@ #include "qom/object.h" typedef ArmSbconI2CState VersatileI2CState; -DECLARE_INSTANCE_CHECKER(VersatileI2CState, VERSATILE_I2C, +DECLARE_INSTANCE_CHECKER(ArmSbconI2CState, VERSATILE_I2C, TYPE_VERSATILE_I2C) @@ -45,7 +45,7 @@ REG32(CONTROL_CLR, 4) static uint64_t versatile_i2c_read(void *opaque, hwaddr offset, unsigned size) { - VersatileI2CState *s = opaque; + ArmSbconI2CState *s = opaque; switch (offset) { case A_CONTROL_SET: @@ -60,7 +60,7 @@ static uint64_t versatile_i2c_read(void *opaque, hwaddr offset, static void versatile_i2c_write(void *opaque, hwaddr offset, uint64_t value, unsigned size) { - VersatileI2CState *s = opaque; + ArmSbconI2CState *s = opaque; switch (offset) { case A_CONTROL_SET: @@ -86,7 +86,7 @@ static const MemoryRegionOps versatile_i2c_ops = { static void versatile_i2c_init(Object *obj) { DeviceState *dev = DEVICE(obj); - VersatileI2CState *s = VERSATILE_I2C(obj); + ArmSbconI2CState *s = VERSATILE_I2C(obj); SysBusDevice *sbd = SYS_BUS_DEVICE(obj); I2CBus *bus; @@ -100,7 +100,7 @@ static void versatile_i2c_init(Object *obj) static const TypeInfo versatile_i2c_info = { .name = TYPE_VERSATILE_I2C, .parent = TYPE_SYS_BUS_DEVICE, - .instance_size = sizeof(VersatileI2CState), + .instance_size = sizeof(ArmSbconI2CState), .instance_init = versatile_i2c_init, };