diff mbox series

[PULL,10/33] sbsa-ref: remove cortex-a76 from list of supported cpus

Message ID 20230203142927.834793-11-peter.maydell@linaro.org
State Accepted
Commit ed65e32cf52a91c620c925faa90049b8e35365e1
Headers show
Series [PULL,01/33] hw/arm: Use TYPE_ARM_SMMUV3 | expand

Commit Message

Peter Maydell Feb. 3, 2023, 2:29 p.m. UTC 
From: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>

Cortex-A76 supports 40bits of address space. sbsa-ref's memory
starts above this limit.

Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20230126114416.2447685-1-marcin.juszkiewicz@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 hw/arm/sbsa-ref.c | 1 -
 1 file changed, 1 deletion(-)
diff mbox series

Patch

diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c
index 8378441dbb1..f778cb6d097 100644
--- a/hw/arm/sbsa-ref.c
+++ b/hw/arm/sbsa-ref.c
@@ -146,7 +146,6 @@  static const int sbsa_ref_irqmap[] = {
 static const char * const valid_cpus[] = {
     ARM_CPU_TYPE_NAME("cortex-a57"),
     ARM_CPU_TYPE_NAME("cortex-a72"),
-    ARM_CPU_TYPE_NAME("cortex-a76"),
     ARM_CPU_TYPE_NAME("neoverse-n1"),
     ARM_CPU_TYPE_NAME("max"),
 };