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[PULL,21/30] target/arm: rename handle_semihosting to tcg_handle_semihosting

Message ID 20230216171123.2518285-22-peter.maydell@linaro.org
State Accepted
Commit a06e3a68ba2b0f51d28f83e94f8266811c0ba05c
Headers show
Series [PULL,01/30] hw/intc/armv7m_nvic: Use OBJECT_DECLARE_SIMPLE_TYPE() macro | expand

Commit Message

Peter Maydell Feb. 16, 2023, 5:11 p.m. UTC 
From: Claudio Fontana <cfontana@suse.de>

make it clearer from the name that this is a tcg-only function.

Signed-off-by: Claudio Fontana <cfontana@suse.de>
Signed-off-by: Fabiano Rosas <farosas@suse.de>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 target/arm/helper.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
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Patch

diff --git a/target/arm/helper.c b/target/arm/helper.c
index 22670c20c00..509e674b0f0 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -11014,7 +11014,7 @@  static void arm_cpu_do_interrupt_aarch64(CPUState *cs)
  * trapped to the hypervisor in KVM.
  */
 #ifdef CONFIG_TCG
-static void handle_semihosting(CPUState *cs)
+static void tcg_handle_semihosting(CPUState *cs)
 {
     ARMCPU *cpu = ARM_CPU(cs);
     CPUARMState *env = &cpu->env;
@@ -11076,7 +11076,7 @@  void arm_cpu_do_interrupt(CPUState *cs)
      */
 #ifdef CONFIG_TCG
     if (cs->exception_index == EXCP_SEMIHOST) {
-        handle_semihosting(cs);
+        tcg_handle_semihosting(cs);
         return;
     }
 #endif