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[209.51.188.17]) by mx.google.com with ESMTPS id n12-20020a0ce48c000000b0056ed2eb18b5si12847912qvl.301.2023.03.02.11.12.56 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Thu, 02 Mar 2023 11:12:56 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=fOR2byWf; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pXoIp-0007nc-LH; Thu, 02 Mar 2023 14:09:19 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pXoIn-0007fW-EV for qemu-devel@nongnu.org; Thu, 02 Mar 2023 14:09:17 -0500 Received: from mail-wr1-x42d.google.com ([2a00:1450:4864:20::42d]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pXoIR-0004Zq-Df for qemu-devel@nongnu.org; Thu, 02 Mar 2023 14:09:17 -0500 Received: by mail-wr1-x42d.google.com with SMTP id v16so191333wrn.0 for ; Thu, 02 Mar 2023 11:08:54 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=MqZnXo7hFBLHq1osD92qYOTfq2ZgDdz/ouY2s2JD3s4=; b=fOR2byWfCCcJXjXfwKA46URGir/fGPkWaGXjvyaUgzbeHfEdk+5+rMh8/ZWbZSyatP 0ODUvIcB0kpuSPwdT3VpN7Y/ItmmWXOXCM5GYBnwogvyhtzfBfT2ic/U2IM2PdcKBh7z FpZX2SmOXyLbWDtzIvURSf4W6ozOFlGlY/kSvWiM6O55YwbaV3bUmgz2ELDtEF7+potP OoOfd0ldZcJX+A3T6bBMS+IiGWAdhZiESkj/pAan4toAgMNH0Ef53jFKN6q/JGeNehmg JYwd3xCpfUEcOtPXnEGJSkg9XyrjsnyXjhEpvqMhUYswkJU7P1n80aZDHT+ssIlZcFXl OPLQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=MqZnXo7hFBLHq1osD92qYOTfq2ZgDdz/ouY2s2JD3s4=; b=lYIlcfMz4r7nWkYW//0mFgKvfrX2JMBf+MBPpWOzdC6P+03+O1aPW3LI2ZQQi0agVL +TdIwGhhcuWjdVcMz/7ucieK/0QsDh4zE4KgRC0V9wWK2IsgiQcQG85zOew2yKhjR1o3 AlrW6R0XfyPvNWZeSbO/A08kXVWVSlCIFYZnqf9ZdsYkmLGgx0sI7S7uN57ChdvyU65d pKmYtLqfS08O0vobl9b9VkXbn/WdwUtaopUQ1wmBaieSFwIWgH5xG5ExoRY3NKiAZdmM GEsCCIm85ogcsKdEcoEq+qLrRiqhX2SZNEotPn1gjJFhUajAz23iP3Sd78WudBaXujN3 ZEPQ== X-Gm-Message-State: AO0yUKWOvWlHI2SuLrjUt0iTsHFRnP8QomVAX3cSut8rvnuMYjHBk300 QwVokexjSIh34bb6mgZ6byBUmg== X-Received: by 2002:a05:6000:c8:b0:2c3:e0a0:93f with SMTP id q8-20020a05600000c800b002c3e0a0093fmr8547360wrx.8.1677784133847; Thu, 02 Mar 2023 11:08:53 -0800 (PST) Received: from zen.linaroharston ([85.9.250.243]) by smtp.gmail.com with ESMTPSA id a12-20020a056000100c00b002c55ec7f661sm190603wrx.5.2023.03.02.11.08.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 02 Mar 2023 11:08:53 -0800 (PST) Received: from zen.lan (localhost [127.0.0.1]) by zen.linaroharston (Postfix) with ESMTP id A063E1FFD0; Thu, 2 Mar 2023 19:08:50 +0000 (GMT) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: qemu-devel@nongnu.org Cc: Weiwei Li , =?utf-8?q?C=C3=A9dric_Le_Goater?= , Palmer Dabbelt , Laurent Vivier , nicolas.eder@lauterbach.com, Ilya Leoshkevich , kvm@vger.kernel.org, "Edgar E. Iglesias" , David Gibson , Max Filippov , Sunil Muthuswamy , qemu-s390x@nongnu.org, Stafford Horne , Bin Meng , Marek Vasut , Greg Kurz , Song Gao , Aleksandar Rikalo , Liu Zhiwei , Alistair Francis , Chris Wulff , qemu-riscv@nongnu.org, Michael Rolnik , qemu-arm@nongnu.org, Cleber Rosa , Artyom Tarasenko , Marcel Apfelbaum , Eduardo Habkost , Yoshinori Sato , Alexandre Iooss , Daniel Henrique Barboza , Jiaxun Yang , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , mads@ynddal.dk, Mark Cave-Ayland , qemu-ppc@nongnu.org, Richard Henderson , John Snow , Xiaojuan Yang , Thomas Huth , Paolo Bonzini , Mahmoud Mandour , Aurelien Jarno , Bastian Koppelmann , Yanan Wang , David Hildenbrand , Taylor Simpson , Peter Maydell , =?utf-8?q?Alex_Benn=C3=A9e?= , Mads Ynddal Subject: [PATCH v4 26/26] gdbstub: move update guest debug to accel ops Date: Thu, 2 Mar 2023 19:08:46 +0000 Message-Id: <20230302190846.2593720-27-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230302190846.2593720-1-alex.bennee@linaro.org> References: <20230302190846.2593720-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42d; envelope-from=alex.bennee@linaro.org; helo=mail-wr1-x42d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Mads Ynddal Continuing the refactor of a48e7d9e52 (gdbstub: move guest debug support check to ops) by removing hardcoded kvm_enabled() from generic cpu.c code, and replace it with a property of AccelOpsClass. Signed-off-by: Mads Ynddal Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20230207131721.49233-1-mads@ynddal.dk> [AJB: add ifdef around update_guest_debug_ops, fix brace] Signed-off-by: Alex Bennée --- include/sysemu/accel-ops.h | 1 + accel/kvm/kvm-accel-ops.c | 8 ++++++++ cpu.c | 11 ++++++++--- 3 files changed, 17 insertions(+), 3 deletions(-) diff --git a/include/sysemu/accel-ops.h b/include/sysemu/accel-ops.h index 30690c71bd..3c1fab4b1e 100644 --- a/include/sysemu/accel-ops.h +++ b/include/sysemu/accel-ops.h @@ -48,6 +48,7 @@ struct AccelOpsClass { /* gdbstub hooks */ bool (*supports_guest_debug)(void); + int (*update_guest_debug)(CPUState *cpu); int (*insert_breakpoint)(CPUState *cpu, int type, vaddr addr, vaddr len); int (*remove_breakpoint)(CPUState *cpu, int type, vaddr addr, vaddr len); void (*remove_all_breakpoints)(CPUState *cpu); diff --git a/accel/kvm/kvm-accel-ops.c b/accel/kvm/kvm-accel-ops.c index fbf4fe3497..457eafa380 100644 --- a/accel/kvm/kvm-accel-ops.c +++ b/accel/kvm/kvm-accel-ops.c @@ -86,6 +86,13 @@ static bool kvm_cpus_are_resettable(void) return !kvm_enabled() || kvm_cpu_check_are_resettable(); } +#ifdef KVM_CAP_SET_GUEST_DEBUG +static int kvm_update_guest_debug_ops(CPUState *cpu) +{ + return kvm_update_guest_debug(cpu, 0); +} +#endif + static void kvm_accel_ops_class_init(ObjectClass *oc, void *data) { AccelOpsClass *ops = ACCEL_OPS_CLASS(oc); @@ -99,6 +106,7 @@ static void kvm_accel_ops_class_init(ObjectClass *oc, void *data) ops->synchronize_pre_loadvm = kvm_cpu_synchronize_pre_loadvm; #ifdef KVM_CAP_SET_GUEST_DEBUG + ops->update_guest_debug = kvm_update_guest_debug_ops; ops->supports_guest_debug = kvm_supports_guest_debug; ops->insert_breakpoint = kvm_insert_breakpoint; ops->remove_breakpoint = kvm_remove_breakpoint; diff --git a/cpu.c b/cpu.c index e6abc6c76c..567b23af46 100644 --- a/cpu.c +++ b/cpu.c @@ -31,8 +31,8 @@ #include "hw/core/sysemu-cpu-ops.h" #include "exec/address-spaces.h" #endif +#include "sysemu/cpus.h" #include "sysemu/tcg.h" -#include "sysemu/kvm.h" #include "exec/replay-core.h" #include "exec/cpu-common.h" #include "exec/exec-all.h" @@ -326,9 +326,14 @@ void cpu_single_step(CPUState *cpu, int enabled) { if (cpu->singlestep_enabled != enabled) { cpu->singlestep_enabled = enabled; - if (kvm_enabled()) { - kvm_update_guest_debug(cpu, 0); + +#if !defined(CONFIG_USER_ONLY) + const AccelOpsClass *ops = cpus_get_accel(); + if (ops->update_guest_debug) { + ops->update_guest_debug(cpu); } +#endif + trace_breakpoint_singlestep(cpu->cpu_index, enabled); } }