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[2/9] target/cris: Finish conversion to tcg_gen_qemu_{ld,st}_*

Message ID 20230502135741.1158035-3-richard.henderson@linaro.org
State Superseded
Headers show
Series tcg: Remove compatability helpers for qemu ld/st | expand

Commit Message

Richard Henderson May 2, 2023, 1:57 p.m. UTC 
Convert away from the old interface with the implicit
MemOp argument.  In this case we can fold the calls
using the size bits of MemOp.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/cris/translate_v10.c.inc | 18 ++++--------------
 1 file changed, 4 insertions(+), 14 deletions(-)

Comments

Xingtao Yao (Fujitsu)" via May 3, 2023, 12:47 p.m. UTC | #1 
On 5/2/23 15:57, Richard Henderson wrote:
> Convert away from the old interface with the implicit
> MemOp argument.  In this case we can fold the calls
> using the size bits of MemOp.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
>   target/cris/translate_v10.c.inc | 18 ++++--------------
>   1 file changed, 4 insertions(+), 14 deletions(-)
>
Reviewed-by: Anton Johansson <anjo@rev.ng>
diff mbox series

Patch

diff --git a/target/cris/translate_v10.c.inc b/target/cris/translate_v10.c.inc
index 32338bb69b..b7b0517982 100644
--- a/target/cris/translate_v10.c.inc
+++ b/target/cris/translate_v10.c.inc
@@ -80,13 +80,9 @@  static void gen_store_v10_conditional(DisasContext *dc, TCGv addr, TCGv val,
     /* Store only if F flag isn't set */
     tcg_gen_andi_tl(t1, cpu_PR[PR_CCS], F_FLAG_V10);
     tcg_gen_brcondi_tl(TCG_COND_NE, t1, 0, l1);
-    if (size == 1) {
-        tcg_gen_qemu_st8(tval, taddr, mem_index);
-    } else if (size == 2) {
-        tcg_gen_qemu_st16(tval, taddr, mem_index);
-    } else {
-        tcg_gen_qemu_st32(tval, taddr, mem_index);
-    }
+
+    tcg_gen_qemu_st_tl(tval, taddr, mem_index, ctz32(size) | MO_TE);
+
     gen_set_label(l1);
     tcg_gen_shri_tl(t1, t1, 1);  /* shift F to P position */
     tcg_gen_or_tl(cpu_PR[PR_CCS], cpu_PR[PR_CCS], t1); /*P=F*/
@@ -109,13 +105,7 @@  static void gen_store_v10(DisasContext *dc, TCGv addr, TCGv val,
         return;
     }
 
-    if (size == 1) {
-        tcg_gen_qemu_st8(val, addr, mem_index);
-    } else if (size == 2) {
-        tcg_gen_qemu_st16(val, addr, mem_index);
-    } else {
-        tcg_gen_qemu_st32(val, addr, mem_index);
-    }
+    tcg_gen_qemu_st_tl(val, addr, mem_index, ctz32(size) | MO_TE);
 }