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[PULL,68/80] tcg/i386: Always enable TCG_TARGET_HAS_extr[lh]_i64_i32

Message ID 20230516194145.1749305-69-richard.henderson@linaro.org
State Accepted
Commit 7a9ccb869c31430ac8a852ae45ea95023b2d0d34
Headers show
Series [PULL,01/80] tcg/i386: Set P_REXW in tcg_out_addi_ptr | expand

Commit Message

Richard Henderson May 16, 2023, 7:41 p.m. UTC 
Keep all 32-bit values zero extended in the register, not solely when
addresses are 32 bits.  This eliminates a dependency on TARGET_LONG_BITS.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 tcg/i386/tcg-target.h | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)
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Patch

diff --git a/tcg/i386/tcg-target.h b/tcg/i386/tcg-target.h
index 7f69997e30..7ebd6e5135 100644
--- a/tcg/i386/tcg-target.h
+++ b/tcg/i386/tcg-target.h
@@ -154,9 +154,9 @@  extern bool have_atomic16;
 #define TCG_TARGET_HAS_mulsh_i32        0
 
 #if TCG_TARGET_REG_BITS == 64
-/* Keep target addresses zero-extended in a register.  */
-#define TCG_TARGET_HAS_extrl_i64_i32    (TARGET_LONG_BITS == 32)
-#define TCG_TARGET_HAS_extrh_i64_i32    (TARGET_LONG_BITS == 32)
+/* Keep 32-bit values zero-extended in a register.  */
+#define TCG_TARGET_HAS_extrl_i64_i32    1
+#define TCG_TARGET_HAS_extrh_i64_i32    1
 #define TCG_TARGET_HAS_div2_i64         1
 #define TCG_TARGET_HAS_rot_i64          1
 #define TCG_TARGET_HAS_ext8s_i64        1