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([2602:ae:1598:4c01:9a37:84b6:b3f0:f301]) by smtp.gmail.com with ESMTPSA id h8-20020a654688000000b00530277f7b0fsm2849037pgr.53.2023.06.03.09.55.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 03 Jun 2023 09:55:31 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: ysato@users.sourceforge.jp, philmd@linaro.org Subject: [PATCH] target/sh4: Emit insn_start for each insn in gUSA region Date: Sat, 3 Jun 2023 09:55:30 -0700 Message-Id: <20230603165530.1189588-1-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::12a; envelope-from=richard.henderson@linaro.org; helo=mail-il1-x12a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Fixes an assert in tcg_gen_code that we don't accidentally eliminate an insn_start during optimization. Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé --- Test case is tests/tcg/multiarch/testthread.c; the assert for equality is new with https://lore.kernel.org/qemu-devel/20230531040330.8950-26-richard.henderson@linaro.org/ r~ --- target/sh4/translate.c | 15 ++++++++++++--- 1 file changed, 12 insertions(+), 3 deletions(-) diff --git a/target/sh4/translate.c b/target/sh4/translate.c index efd889d9d3..49c87d7a01 100644 --- a/target/sh4/translate.c +++ b/target/sh4/translate.c @@ -2144,9 +2144,7 @@ static void decode_gusa(DisasContext *ctx, CPUSH4State *env) /* The entire region has been translated. */ ctx->envflags &= ~TB_FLAG_GUSA_MASK; - ctx->base.pc_next = pc_end; - ctx->base.num_insns += max_insns - 1; - return; + goto done; fail: qemu_log_mask(LOG_UNIMP, "Unrecognized gUSA sequence %08x-%08x\n", @@ -2163,8 +2161,19 @@ static void decode_gusa(DisasContext *ctx, CPUSH4State *env) purposes of accounting within the TB. We might as well report the entire region consumed via ctx->base.pc_next so that it's immediately available in the disassembly dump. */ + + done: ctx->base.pc_next = pc_end; ctx->base.num_insns += max_insns - 1; + + /* + * Emit insn_start to cover each of the insns in the region. + * This matches an assert in tcg.c making sure that we have + * tb->icount * insn_start. + */ + for (i = 1; i < max_insns; ++i) { + tcg_gen_insn_start(pc + i * 2, ctx->envflags); + } } #endif