| Message ID | 20230808031143.50925-8-richard.henderson@linaro.org |
|---|---|
| State | Superseded |
| Headers | show |
| Series | tcg: Introduce negsetcond opcodes | expand |
On 8/8/23 00:11, Richard Henderson wrote: > Signed-off-by: Richard Henderson <richard.henderson@linaro.org> > --- Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com> > target/ppc/translate/fixedpoint-impl.c.inc | 6 ++++-- > target/ppc/translate/vmx-impl.c.inc | 8 +++----- > 2 files changed, 7 insertions(+), 7 deletions(-) > > diff --git a/target/ppc/translate/fixedpoint-impl.c.inc b/target/ppc/translate/fixedpoint-impl.c.inc > index f47f1a50e8..4ce02fd3a4 100644 > --- a/target/ppc/translate/fixedpoint-impl.c.inc > +++ b/target/ppc/translate/fixedpoint-impl.c.inc > @@ -342,12 +342,14 @@ static bool do_set_bool_cond(DisasContext *ctx, arg_X_bi *a, bool neg, bool rev) > uint32_t mask = 0x08 >> (a->bi & 0x03); > TCGCond cond = rev ? TCG_COND_EQ : TCG_COND_NE; > TCGv temp = tcg_temp_new(); > + TCGv zero = tcg_constant_tl(0); > > tcg_gen_extu_i32_tl(temp, cpu_crf[a->bi >> 2]); > tcg_gen_andi_tl(temp, temp, mask); > - tcg_gen_setcondi_tl(cond, cpu_gpr[a->rt], temp, 0); > if (neg) { > - tcg_gen_neg_tl(cpu_gpr[a->rt], cpu_gpr[a->rt]); > + tcg_gen_negsetcond_tl(cond, cpu_gpr[a->rt], temp, zero); > + } else { > + tcg_gen_setcond_tl(cond, cpu_gpr[a->rt], temp, zero); > } > return true; > } > diff --git a/target/ppc/translate/vmx-impl.c.inc b/target/ppc/translate/vmx-impl.c.inc > index c8712dd7d8..6d7669aabd 100644 > --- a/target/ppc/translate/vmx-impl.c.inc > +++ b/target/ppc/translate/vmx-impl.c.inc > @@ -1341,8 +1341,7 @@ static bool trans_VCMPEQUQ(DisasContext *ctx, arg_VC *a) > tcg_gen_xor_i64(t1, t0, t1); > > tcg_gen_or_i64(t1, t1, t2); > - tcg_gen_setcondi_i64(TCG_COND_EQ, t1, t1, 0); > - tcg_gen_neg_i64(t1, t1); > + tcg_gen_negsetcond_i64(TCG_COND_EQ, t1, t1, tcg_constant_i64(0)); > > set_avr64(a->vrt, t1, true); > set_avr64(a->vrt, t1, false); > @@ -1365,15 +1364,14 @@ static bool do_vcmpgtq(DisasContext *ctx, arg_VC *a, bool sign) > > get_avr64(t0, a->vra, false); > get_avr64(t1, a->vrb, false); > - tcg_gen_setcond_i64(TCG_COND_GTU, t2, t0, t1); > + tcg_gen_negsetcond_i64(TCG_COND_GTU, t2, t0, t1); > > get_avr64(t0, a->vra, true); > get_avr64(t1, a->vrb, true); > tcg_gen_movcond_i64(TCG_COND_EQ, t2, t0, t1, t2, tcg_constant_i64(0)); > - tcg_gen_setcond_i64(sign ? TCG_COND_GT : TCG_COND_GTU, t1, t0, t1); > + tcg_gen_negsetcond_i64(sign ? TCG_COND_GT : TCG_COND_GTU, t1, t0, t1); > > tcg_gen_or_i64(t1, t1, t2); > - tcg_gen_neg_i64(t1, t1); > > set_avr64(a->vrt, t1, true); > set_avr64(a->vrt, t1, false);
On Tue Aug 8, 2023 at 1:11 PM AEST, Richard Henderson wrote: > Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Nicholas Piggin <npiggin@gmail.com> Tested-by: Nicholas Piggin <npiggin@gmail.com> > --- > target/ppc/translate/fixedpoint-impl.c.inc | 6 ++++-- > target/ppc/translate/vmx-impl.c.inc | 8 +++----- > 2 files changed, 7 insertions(+), 7 deletions(-) > > diff --git a/target/ppc/translate/fixedpoint-impl.c.inc b/target/ppc/translate/fixedpoint-impl.c.inc > index f47f1a50e8..4ce02fd3a4 100644 > --- a/target/ppc/translate/fixedpoint-impl.c.inc > +++ b/target/ppc/translate/fixedpoint-impl.c.inc > @@ -342,12 +342,14 @@ static bool do_set_bool_cond(DisasContext *ctx, arg_X_bi *a, bool neg, bool rev) > uint32_t mask = 0x08 >> (a->bi & 0x03); > TCGCond cond = rev ? TCG_COND_EQ : TCG_COND_NE; > TCGv temp = tcg_temp_new(); > + TCGv zero = tcg_constant_tl(0); > > tcg_gen_extu_i32_tl(temp, cpu_crf[a->bi >> 2]); > tcg_gen_andi_tl(temp, temp, mask); > - tcg_gen_setcondi_tl(cond, cpu_gpr[a->rt], temp, 0); > if (neg) { > - tcg_gen_neg_tl(cpu_gpr[a->rt], cpu_gpr[a->rt]); > + tcg_gen_negsetcond_tl(cond, cpu_gpr[a->rt], temp, zero); > + } else { > + tcg_gen_setcond_tl(cond, cpu_gpr[a->rt], temp, zero); > } > return true; > } > diff --git a/target/ppc/translate/vmx-impl.c.inc b/target/ppc/translate/vmx-impl.c.inc > index c8712dd7d8..6d7669aabd 100644 > --- a/target/ppc/translate/vmx-impl.c.inc > +++ b/target/ppc/translate/vmx-impl.c.inc > @@ -1341,8 +1341,7 @@ static bool trans_VCMPEQUQ(DisasContext *ctx, arg_VC *a) > tcg_gen_xor_i64(t1, t0, t1); > > tcg_gen_or_i64(t1, t1, t2); > - tcg_gen_setcondi_i64(TCG_COND_EQ, t1, t1, 0); > - tcg_gen_neg_i64(t1, t1); > + tcg_gen_negsetcond_i64(TCG_COND_EQ, t1, t1, tcg_constant_i64(0)); > > set_avr64(a->vrt, t1, true); > set_avr64(a->vrt, t1, false); > @@ -1365,15 +1364,14 @@ static bool do_vcmpgtq(DisasContext *ctx, arg_VC *a, bool sign) > > get_avr64(t0, a->vra, false); > get_avr64(t1, a->vrb, false); > - tcg_gen_setcond_i64(TCG_COND_GTU, t2, t0, t1); > + tcg_gen_negsetcond_i64(TCG_COND_GTU, t2, t0, t1); > > get_avr64(t0, a->vra, true); > get_avr64(t1, a->vrb, true); > tcg_gen_movcond_i64(TCG_COND_EQ, t2, t0, t1, t2, tcg_constant_i64(0)); > - tcg_gen_setcond_i64(sign ? TCG_COND_GT : TCG_COND_GTU, t1, t0, t1); > + tcg_gen_negsetcond_i64(sign ? TCG_COND_GT : TCG_COND_GTU, t1, t0, t1); > > tcg_gen_or_i64(t1, t1, t2); > - tcg_gen_neg_i64(t1, t1); > > set_avr64(a->vrt, t1, true); > set_avr64(a->vrt, t1, false);
diff --git a/target/ppc/translate/fixedpoint-impl.c.inc b/target/ppc/translate/fixedpoint-impl.c.inc index f47f1a50e8..4ce02fd3a4 100644 --- a/target/ppc/translate/fixedpoint-impl.c.inc +++ b/target/ppc/translate/fixedpoint-impl.c.inc @@ -342,12 +342,14 @@ static bool do_set_bool_cond(DisasContext *ctx, arg_X_bi *a, bool neg, bool rev) uint32_t mask = 0x08 >> (a->bi & 0x03); TCGCond cond = rev ? TCG_COND_EQ : TCG_COND_NE; TCGv temp = tcg_temp_new(); + TCGv zero = tcg_constant_tl(0); tcg_gen_extu_i32_tl(temp, cpu_crf[a->bi >> 2]); tcg_gen_andi_tl(temp, temp, mask); - tcg_gen_setcondi_tl(cond, cpu_gpr[a->rt], temp, 0); if (neg) { - tcg_gen_neg_tl(cpu_gpr[a->rt], cpu_gpr[a->rt]); + tcg_gen_negsetcond_tl(cond, cpu_gpr[a->rt], temp, zero); + } else { + tcg_gen_setcond_tl(cond, cpu_gpr[a->rt], temp, zero); } return true; } diff --git a/target/ppc/translate/vmx-impl.c.inc b/target/ppc/translate/vmx-impl.c.inc index c8712dd7d8..6d7669aabd 100644 --- a/target/ppc/translate/vmx-impl.c.inc +++ b/target/ppc/translate/vmx-impl.c.inc @@ -1341,8 +1341,7 @@ static bool trans_VCMPEQUQ(DisasContext *ctx, arg_VC *a) tcg_gen_xor_i64(t1, t0, t1); tcg_gen_or_i64(t1, t1, t2); - tcg_gen_setcondi_i64(TCG_COND_EQ, t1, t1, 0); - tcg_gen_neg_i64(t1, t1); + tcg_gen_negsetcond_i64(TCG_COND_EQ, t1, t1, tcg_constant_i64(0)); set_avr64(a->vrt, t1, true); set_avr64(a->vrt, t1, false); @@ -1365,15 +1364,14 @@ static bool do_vcmpgtq(DisasContext *ctx, arg_VC *a, bool sign) get_avr64(t0, a->vra, false); get_avr64(t1, a->vrb, false); - tcg_gen_setcond_i64(TCG_COND_GTU, t2, t0, t1); + tcg_gen_negsetcond_i64(TCG_COND_GTU, t2, t0, t1); get_avr64(t0, a->vra, true); get_avr64(t1, a->vrb, true); tcg_gen_movcond_i64(TCG_COND_EQ, t2, t0, t1, t2, tcg_constant_i64(0)); - tcg_gen_setcond_i64(sign ? TCG_COND_GT : TCG_COND_GTU, t1, t0, t1); + tcg_gen_negsetcond_i64(sign ? TCG_COND_GT : TCG_COND_GTU, t1, t0, t1); tcg_gen_or_i64(t1, t1, t2); - tcg_gen_neg_i64(t1, t1); set_avr64(a->vrt, t1, true); set_avr64(a->vrt, t1, false);
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- target/ppc/translate/fixedpoint-impl.c.inc | 6 ++++-- target/ppc/translate/vmx-impl.c.inc | 8 +++----- 2 files changed, 7 insertions(+), 7 deletions(-)