diff mbox series

[v2,09/24] accel/tcg: Remove CPUState.icount_decr_ptr

Message ID 20230914024435.1381329-10-richard.henderson@linaro.org
State Superseded
Headers show
Series Reduce usage of CPUArchState in cputlb.c | expand

Commit Message

Richard Henderson Sept. 14, 2023, 2:44 a.m. UTC
We can now access icount_decr directly.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 include/exec/cpu-all.h | 1 -
 include/hw/core/cpu.h  | 2 --
 hw/core/cpu-common.c   | 4 ++--
 3 files changed, 2 insertions(+), 5 deletions(-)

Comments

Xingtao Yao (Fujitsu)" via Sept. 14, 2023, 10:28 a.m. UTC | #1
On 9/14/23 04:44, Richard Henderson wrote:
> We can now access icount_decr directly.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
>   include/exec/cpu-all.h | 1 -
>   include/hw/core/cpu.h  | 2 --
>   hw/core/cpu-common.c   | 4 ++--
>   3 files changed, 2 insertions(+), 5 deletions(-)
>
> diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h
> index c3c78ed8ab..3b01e4ee25 100644
> --- a/include/exec/cpu-all.h
> +++ b/include/exec/cpu-all.h
> @@ -434,7 +434,6 @@ void tcg_exec_unrealizefn(CPUState *cpu);
>   static inline void cpu_set_cpustate_pointers(ArchCPU *cpu)
>   {
>       cpu->parent_obj.env_ptr = &cpu->env;
> -    cpu->parent_obj.icount_decr_ptr = &cpu->parent_obj.neg.icount_decr;
>   }
>   
>   /* Validate correct placement of CPUArchState. */
> diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h
> index 1f289136ec..44955af3bc 100644
> --- a/include/hw/core/cpu.h
> +++ b/include/hw/core/cpu.h
> @@ -440,7 +440,6 @@ struct qemu_work_item;
>    * @as: Pointer to the first AddressSpace, for the convenience of targets which
>    *      only have a single AddressSpace
>    * @env_ptr: Pointer to subclass-specific CPUArchState field.
> - * @icount_decr_ptr: Pointer to IcountDecr field within subclass.
>    * @gdb_regs: Additional GDB registers.
>    * @gdb_num_regs: Number of total registers accessible to GDB.
>    * @gdb_num_g_regs: Number of registers in GDB 'g' packets.
> @@ -512,7 +511,6 @@ struct CPUState {
>       MemoryRegion *memory;
>   
>       CPUArchState *env_ptr;
> -    IcountDecr *icount_decr_ptr;
>   
>       CPUJumpCache *tb_jmp_cache;
>   
> diff --git a/hw/core/cpu-common.c b/hw/core/cpu-common.c
> index ced66c2b34..08d5bbc873 100644
> --- a/hw/core/cpu-common.c
> +++ b/hw/core/cpu-common.c
> @@ -86,7 +86,7 @@ void cpu_exit(CPUState *cpu)
>       qatomic_set(&cpu->exit_request, 1);
>       /* Ensure cpu_exec will see the exit request after TCG has exited.  */
>       smp_wmb();
> -    qatomic_set(&cpu->icount_decr_ptr->u16.high, -1);
> +    qatomic_set(&cpu->neg.icount_decr.u16.high, -1);
>   }
>   
>   static int cpu_common_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg)
> @@ -130,7 +130,7 @@ static void cpu_common_reset_hold(Object *obj)
>       cpu->halted = cpu->start_powered_off;
>       cpu->mem_io_pc = 0;
>       cpu->icount_extra = 0;
> -    qatomic_set(&cpu->icount_decr_ptr->u32, 0);
> +    qatomic_set(&cpu->neg.icount_decr.u32, 0);
>       cpu->can_do_io = 1;
>       cpu->exception_index = -1;
>       cpu->crash_occurred = false;
Reviewed-by: Anton Johansson <anjo@rev.ng>
diff mbox series

Patch

diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h
index c3c78ed8ab..3b01e4ee25 100644
--- a/include/exec/cpu-all.h
+++ b/include/exec/cpu-all.h
@@ -434,7 +434,6 @@  void tcg_exec_unrealizefn(CPUState *cpu);
 static inline void cpu_set_cpustate_pointers(ArchCPU *cpu)
 {
     cpu->parent_obj.env_ptr = &cpu->env;
-    cpu->parent_obj.icount_decr_ptr = &cpu->parent_obj.neg.icount_decr;
 }
 
 /* Validate correct placement of CPUArchState. */
diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h
index 1f289136ec..44955af3bc 100644
--- a/include/hw/core/cpu.h
+++ b/include/hw/core/cpu.h
@@ -440,7 +440,6 @@  struct qemu_work_item;
  * @as: Pointer to the first AddressSpace, for the convenience of targets which
  *      only have a single AddressSpace
  * @env_ptr: Pointer to subclass-specific CPUArchState field.
- * @icount_decr_ptr: Pointer to IcountDecr field within subclass.
  * @gdb_regs: Additional GDB registers.
  * @gdb_num_regs: Number of total registers accessible to GDB.
  * @gdb_num_g_regs: Number of registers in GDB 'g' packets.
@@ -512,7 +511,6 @@  struct CPUState {
     MemoryRegion *memory;
 
     CPUArchState *env_ptr;
-    IcountDecr *icount_decr_ptr;
 
     CPUJumpCache *tb_jmp_cache;
 
diff --git a/hw/core/cpu-common.c b/hw/core/cpu-common.c
index ced66c2b34..08d5bbc873 100644
--- a/hw/core/cpu-common.c
+++ b/hw/core/cpu-common.c
@@ -86,7 +86,7 @@  void cpu_exit(CPUState *cpu)
     qatomic_set(&cpu->exit_request, 1);
     /* Ensure cpu_exec will see the exit request after TCG has exited.  */
     smp_wmb();
-    qatomic_set(&cpu->icount_decr_ptr->u16.high, -1);
+    qatomic_set(&cpu->neg.icount_decr.u16.high, -1);
 }
 
 static int cpu_common_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg)
@@ -130,7 +130,7 @@  static void cpu_common_reset_hold(Object *obj)
     cpu->halted = cpu->start_powered_off;
     cpu->mem_io_pc = 0;
     cpu->icount_extra = 0;
-    qatomic_set(&cpu->icount_decr_ptr->u32, 0);
+    qatomic_set(&cpu->neg.icount_decr.u32, 0);
     cpu->can_do_io = 1;
     cpu->exception_index = -1;
     cpu->crash_occurred = false;