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[176.131.222.246]) by smtp.gmail.com with ESMTPSA id w6-20020a5d6806000000b003196b1bb528sm1483694wru.64.2023.10.03.05.30.59 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 03 Oct 2023 05:31:00 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Eduardo Habkost , Yanan Wang , Paolo Bonzini , kvm@vger.kernel.org, =?utf-8?q?Alex_Benn=C3=A9e?= , Claudio Fontana , Richard Henderson , Marcelo Tosatti , Roman Bolshakov , Fabiano Rosas , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Marcel Apfelbaum , Cameron Esfahani Subject: [PATCH v2 5/7] accel: Declare AccelClass::cpu_common_[un]realize() handlers Date: Tue, 3 Oct 2023 14:30:23 +0200 Message-ID: <20231003123026.99229-6-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231003123026.99229-1-philmd@linaro.org> References: <20231003123026.99229-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::431; envelope-from=philmd@linaro.org; helo=mail-wr1-x431.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Currently accel_cpu_realize() only performs target-specific realization. Introduce the cpu_common_[un]realize fields in the base AccelClass to be able to perform target-agnostic [un]realization of vCPUs. Signed-off-by: Philippe Mathieu-Daudé --- include/qemu/accel.h | 2 ++ accel/accel-common.c | 21 +++++++++++++++++++-- 2 files changed, 21 insertions(+), 2 deletions(-) diff --git a/include/qemu/accel.h b/include/qemu/accel.h index 446153b145..972a849a2b 100644 --- a/include/qemu/accel.h +++ b/include/qemu/accel.h @@ -43,6 +43,8 @@ typedef struct AccelClass { bool (*has_memory)(MachineState *ms, AddressSpace *as, hwaddr start_addr, hwaddr size); #endif + bool (*cpu_common_realize)(CPUState *cpu, Error **errp); + void (*cpu_common_unrealize)(CPUState *cpu); /* gdbstub related hooks */ int (*gdbstub_supported_sstep_flags)(void); diff --git a/accel/accel-common.c b/accel/accel-common.c index e9548eac29..11d74b4ad7 100644 --- a/accel/accel-common.c +++ b/accel/accel-common.c @@ -122,15 +122,32 @@ void accel_cpu_instance_init(CPUState *cpu) bool accel_cpu_common_realize(CPUState *cpu, Error **errp) { CPUClass *cc = CPU_GET_CLASS(cpu); + AccelState *accel = current_accel(); + AccelClass *acc = ACCEL_GET_CLASS(accel); - if (cc->accel_cpu && cc->accel_cpu->cpu_target_realize) { - return cc->accel_cpu->cpu_target_realize(cpu, errp); + /* target specific realization */ + if (cc->accel_cpu && cc->accel_cpu->cpu_target_realize + && !cc->accel_cpu->cpu_target_realize(cpu, errp)) { + return false; } + + /* generic realization */ + if (acc->cpu_common_realize && !acc->cpu_common_realize(cpu, errp)) { + return false; + } + return true; } void accel_cpu_common_unrealize(CPUState *cpu) { + AccelState *accel = current_accel(); + AccelClass *acc = ACCEL_GET_CLASS(accel); + + /* generic unrealization */ + if (acc->cpu_common_unrealize) { + acc->cpu_common_unrealize(cpu); + } } int accel_supported_gdbstub_sstep_flags(void)