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([71.212.149.95]) by smtp.gmail.com with ESMTPSA id g7-20020a170902934700b001b7cbc5871csm1920432plp.53.2023.10.03.11.31.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 03 Oct 2023 11:31:02 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: fei2.wu@intel.com Subject: [PATCH v17 04/16] tcg: Record nb_spills in TCGContext Date: Tue, 3 Oct 2023 11:30:46 -0700 Message-Id: <20231003183058.1639121-5-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231003183058.1639121-1-richard.henderson@linaro.org> References: <20231003183058.1639121-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::62e; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Record the number of times a temporary is forced into memory and the store would not have been required if there an infinite number of call-saved cpu registers available. This excludes stores that are required by semantics to return computed values to their home slot in ENV, i.e. NEED_SYNC_ARG. To be copied into TBStatistics when desired. Signed-off-by: Richard Henderson Reviewed-by: Alex Bennée --- include/tcg/tcg.h | 1 + tcg/tcg.c | 36 +++++++++++++++++++++++------------- 2 files changed, 24 insertions(+), 13 deletions(-) diff --git a/include/tcg/tcg.h b/include/tcg/tcg.h index d60349878f..c2b1a2e187 100644 --- a/include/tcg/tcg.h +++ b/include/tcg/tcg.h @@ -567,6 +567,7 @@ struct TCGContext { /* Used by TBStatistics */ int orig_nb_ops; int nb_deleted_ops; + int nb_spills; /* Exit to translator on overflow. */ sigjmp_buf jmp_trans; diff --git a/tcg/tcg.c b/tcg/tcg.c index 60be2f429c..471e5eaad9 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -1495,6 +1495,7 @@ void tcg_func_start(TCGContext *s) s->nb_ops = 0; s->nb_labels = 0; s->nb_deleted_ops = 0; + s->nb_spills = 0; s->current_frame_offset = s->frame_start; #ifdef CONFIG_DEBUG_TCG @@ -4118,8 +4119,11 @@ static inline void temp_dead(TCGContext *s, TCGTemp *ts) is non-zero, subsequently release the temporary; if it is positive, the temp is dead; if it is negative, the temp is free. */ static void temp_sync(TCGContext *s, TCGTemp *ts, TCGRegSet allocated_regs, - TCGRegSet preferred_regs, int free_or_dead) + TCGRegSet preferred_regs, int free_or_dead, + bool account_spill) { + bool did_spill = false; + if (!temp_readonly(ts) && !ts->mem_coherent) { if (!ts->mem_allocated) { temp_allocate_frame(s, ts); @@ -4132,6 +4136,7 @@ static void temp_sync(TCGContext *s, TCGTemp *ts, TCGRegSet allocated_regs, if (free_or_dead && tcg_out_sti(s, ts->type, ts->val, ts->mem_base->reg, ts->mem_offset)) { + did_spill = account_spill; break; } temp_load(s, ts, tcg_target_available_regs[ts->type], @@ -4139,6 +4144,7 @@ static void temp_sync(TCGContext *s, TCGTemp *ts, TCGRegSet allocated_regs, /* fallthrough */ case TEMP_VAL_REG: + did_spill = account_spill; tcg_out_st(s, ts->type, ts->reg, ts->mem_base->reg, ts->mem_offset); break; @@ -4155,6 +4161,9 @@ static void temp_sync(TCGContext *s, TCGTemp *ts, TCGRegSet allocated_regs, if (free_or_dead) { temp_free_or_dead(s, ts, free_or_dead); } + if (did_spill) { + s->nb_spills += 1; + } } /* free register 'reg' by spilling the corresponding temporary if necessary */ @@ -4162,7 +4171,7 @@ static void tcg_reg_free(TCGContext *s, TCGReg reg, TCGRegSet allocated_regs) { TCGTemp *ts = s->reg_to_temp[reg]; if (ts != NULL) { - temp_sync(s, ts, allocated_regs, 0, -1); + temp_sync(s, ts, allocated_regs, 0, -1, true); } } @@ -4442,7 +4451,8 @@ static void tcg_reg_alloc_do_movi(TCGContext *s, TCGTemp *ots, ots->val = val; ots->mem_coherent = 0; if (NEED_SYNC_ARG(0)) { - temp_sync(s, ots, s->reserved_regs, preferred_regs, IS_DEAD_ARG(0)); + temp_sync(s, ots, s->reserved_regs, preferred_regs, + IS_DEAD_ARG(0), false); } else if (IS_DEAD_ARG(0)) { temp_dead(s, ots); } @@ -4544,7 +4554,7 @@ static void tcg_reg_alloc_mov(TCGContext *s, const TCGOp *op) ots->mem_coherent = 0; if (NEED_SYNC_ARG(0)) { - temp_sync(s, ots, allocated_regs, 0, 0); + temp_sync(s, ots, allocated_regs, 0, 0, false); } } @@ -4621,7 +4631,7 @@ static void tcg_reg_alloc_dup(TCGContext *s, const TCGOp *op) break; } /* Sync the temp back to its slot and load from there. */ - temp_sync(s, its, s->reserved_regs, 0, 0); + temp_sync(s, its, s->reserved_regs, 0, 0, true); } /* fall through */ @@ -4652,7 +4662,7 @@ static void tcg_reg_alloc_dup(TCGContext *s, const TCGOp *op) temp_dead(s, its); } if (NEED_SYNC_ARG(0)) { - temp_sync(s, ots, s->reserved_regs, 0, 0); + temp_sync(s, ots, s->reserved_regs, 0, 0, false); } if (IS_DEAD_ARG(0)) { temp_dead(s, ots); @@ -4870,7 +4880,7 @@ static void tcg_reg_alloc_op(TCGContext *s, const TCGOp *op) * Cross register class move not supported. Sync the * temp back to its slot and load from there. */ - temp_sync(s, ts, i_allocated_regs, 0, 0); + temp_sync(s, ts, i_allocated_regs, 0, 0, true); tcg_out_ld(s, ts->type, reg, ts->mem_base->reg, ts->mem_offset); } @@ -5019,7 +5029,7 @@ static void tcg_reg_alloc_op(TCGContext *s, const TCGOp *op) tcg_debug_assert(!temp_readonly(ts)); if (NEED_SYNC_ARG(i)) { - temp_sync(s, ts, o_allocated_regs, 0, IS_DEAD_ARG(i)); + temp_sync(s, ts, o_allocated_regs, 0, IS_DEAD_ARG(i), false); } else if (IS_DEAD_ARG(i)) { temp_dead(s, ts); } @@ -5086,8 +5096,8 @@ static bool tcg_reg_alloc_dup2(TCGContext *s, const TCGOp *op) itsl == itsh + (HOST_BIG_ENDIAN ? 1 : -1)) { TCGTemp *its = itsl - HOST_BIG_ENDIAN; - temp_sync(s, its + 0, s->reserved_regs, 0, 0); - temp_sync(s, its + 1, s->reserved_regs, 0, 0); + temp_sync(s, its + 0, s->reserved_regs, 0, 0, true); + temp_sync(s, its + 1, s->reserved_regs, 0, 0, true); if (tcg_out_dupm_vec(s, vtype, MO_64, ots->reg, its->mem_base->reg, its->mem_offset)) { @@ -5107,7 +5117,7 @@ static bool tcg_reg_alloc_dup2(TCGContext *s, const TCGOp *op) temp_dead(s, itsh); } if (NEED_SYNC_ARG(0)) { - temp_sync(s, ots, s->reserved_regs, 0, IS_DEAD_ARG(0)); + temp_sync(s, ots, s->reserved_regs, 0, IS_DEAD_ARG(0), false); } else if (IS_DEAD_ARG(0)) { temp_dead(s, ots); } @@ -5125,7 +5135,7 @@ static void load_arg_reg(TCGContext *s, TCGReg reg, TCGTemp *ts, * Cross register class move not supported. Sync the * temp back to its slot and load from there. */ - temp_sync(s, ts, allocated_regs, 0, 0); + temp_sync(s, ts, allocated_regs, 0, 0, true); tcg_out_ld(s, ts->type, reg, ts->mem_base->reg, ts->mem_offset); } @@ -5307,7 +5317,7 @@ static void tcg_reg_alloc_call(TCGContext *s, TCGOp *op) for (i = 0; i < nb_oargs; i++) { TCGTemp *ts = arg_temp(op->args[i]); if (NEED_SYNC_ARG(i)) { - temp_sync(s, ts, s->reserved_regs, 0, IS_DEAD_ARG(i)); + temp_sync(s, ts, s->reserved_regs, 0, IS_DEAD_ARG(i), false); } else if (IS_DEAD_ARG(i)) { temp_dead(s, ts); }