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([71.212.149.95]) by smtp.gmail.com with ESMTPSA id g7-20020a170902934700b001b7cbc5871csm1920432plp.53.2023.10.03.11.31.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 03 Oct 2023 11:31:05 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: fei2.wu@intel.com, "Vanderson M. do Rosario" , =?utf-8?q?Alex_Benn=C3=A9e?= Subject: [PATCH v17 06/16] accel/tcg: Collect TB execution statistics Date: Tue, 3 Oct 2023 11:30:48 -0700 Message-Id: <20231003183058.1639121-7-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231003183058.1639121-1-richard.henderson@linaro.org> References: <20231003183058.1639121-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::629; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x629.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: "Vanderson M. do Rosario" Collect atomic and normal execution counts for TBs which have allocated a stats structure. Signed-off-by: Vanderson M. do Rosario Signed-off-by: Alex Bennée Signed-off-by: Fei Wu Signed-off-by: Richard Henderson --- accel/tcg/cpu-exec.c | 6 ++++++ accel/tcg/translator.c | 28 ++++++++++++++++++++++++++++ 2 files changed, 34 insertions(+) diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index 1a5bc90220..1114eae5c4 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -26,6 +26,7 @@ #include "disas/disas.h" #include "exec/exec-all.h" #include "tcg/tcg.h" +#include "tcg/tb-stats.h" #include "qemu/atomic.h" #include "qemu/rcu.h" #include "exec/log.h" @@ -601,6 +602,11 @@ void cpu_exec_step_atomic(CPUState *cpu) } cpu_exec_enter(cpu); + + if (tb_stats_enabled_for_tb(tb, TB_STATS_EXEC)) { + tb->tb_stats->executions.atomic++; + } + /* execute the generated code */ trace_exec_tb(tb, pc); cpu_tb_exec(cpu, tb, &tb_exit); diff --git a/accel/tcg/translator.c b/accel/tcg/translator.c index e7abcd86c1..eac281b229 100644 --- a/accel/tcg/translator.c +++ b/accel/tcg/translator.c @@ -14,6 +14,8 @@ #include "exec/translator.h" #include "exec/plugin-gen.h" #include "tcg/tcg-op-common.h" +#include "tcg/tcg-temp-internal.h" +#include "tcg/tb-stats.h" #include "internal-target.h" static void set_can_do_io(DisasContextBase *db, bool val) @@ -112,6 +114,31 @@ static void gen_tb_end(const TranslationBlock *tb, uint32_t cflags, } } +static void gen_tb_exec_count(TranslationBlock *tb) +{ + if (tb_stats_enabled_for_tb(tb, TB_STATS_EXEC)) { + TCGv_ptr ptr = tcg_temp_ebb_new_ptr(); + + tcg_gen_movi_ptr(ptr, (intptr_t)&tb->tb_stats->executions.normal); + if (sizeof(tb->tb_stats->executions.normal) == 4) { + TCGv_i32 t = tcg_temp_ebb_new_i32(); + tcg_gen_ld_i32(t, ptr, 0); + tcg_gen_addi_i32(t, t, 1); + tcg_gen_st_i32(t, ptr, 0); + tcg_temp_free_i32(t); + } else if (sizeof(tb->tb_stats->executions.normal) == 8) { + TCGv_i64 t = tcg_temp_ebb_new_i64(); + tcg_gen_ld_i64(t, ptr, 0); + tcg_gen_addi_i64(t, t, 1); + tcg_gen_st_i64(t, ptr, 0); + tcg_temp_free_i64(t); + } else { + qemu_build_not_reached_always(); + } + tcg_temp_free_ptr(ptr); + } +} + bool translator_use_goto_tb(DisasContextBase *db, vaddr dest) { /* Suppress goto_tb if requested. */ @@ -148,6 +175,7 @@ void translator_loop(CPUState *cpu, TranslationBlock *tb, int *max_insns, /* Start translating. */ icount_start_insn = gen_tb_start(db, cflags); + gen_tb_exec_count(tb); ops->tb_start(db, cpu); tcg_debug_assert(db->is_jmp == DISAS_NEXT); /* no early exit */