From patchwork Tue Oct 10 09:28:54 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 731441 Delivered-To: patch@linaro.org Received: by 2002:a5d:574c:0:b0:31d:da82:a3b4 with SMTP id q12csp1641582wrw; Tue, 10 Oct 2023 02:33:08 -0700 (PDT) X-Google-Smtp-Source: AGHT+IE3vQG3hjDT7wuFbpoFoo5h64k1LyyA0wFQIxql/cY1JNGOOkEI08pVYMaZPueCi5SudgCH X-Received: by 2002:a1f:c6c7:0:b0:49a:3538:18e3 with SMTP id w190-20020a1fc6c7000000b0049a353818e3mr12599276vkf.6.1696930387907; Tue, 10 Oct 2023 02:33:07 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1696930387; cv=none; d=google.com; s=arc-20160816; b=HteHgyMtIgI6j2MQaF/vQJVC0Sry5S3f7QUZhGQqGAX2YgjvvJo/i//hTXQs2BM3z5 QHvVYLuLeo4mbuNJJAHEAkMJwQqJx+48r1HDSS8/0N6DPjkf5QiU41p0C0sp8HWdlPE8 iXBhqRnm9VlcfQkmJRd+AOgRp7Xgqoh70ywOuqTBWn6XJxZ6ebpNQKu/p2uKYfa844N2 1W3RmrYCMWCrZBbU9SQ5WFcAcP+8vkkejpSeheKiZoTxMFP6VhddNKoaRtlOIMeXzfV8 esJQK0/Eqx9efC7F502Iog1cLDTp5nItIva9/ENxWRPglZbO33tZQ4bwDqAGz2LRcR06 63vg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=tGDIRmDFCC3SzHQp/xiOV97Tov37+momJ53r+jvT974=; fh=iupQBrmerAoZOw8v6swRnyYBx+6KhbF7AbBF1Jawaz4=; b=Mr3CVDkasnrvArn4ppzhHv6jOc3RrHXSqRjB384fD2LlSLE0qtfnJuVcl4LW+5OdYp MnUtPH12OzZGWokJZala1KgEm1XNMwac2rJrElSQsOkU2uktW+3smbjhukHCD9kxQs8i 9ATiJmiZpSv4SuuEufi7F1887rOhq1AQe6lVC3jRyUdjYIVtR7Tn3S9KbwQMKPm/aAyB APNlkVdPWu26VrGc41qc5qrR+2+joUbTK3wm5rumjm1Yw3wMW1mecz+JkIvfckXJq4B0 wLE2oSPAGmWzGYBJm/gciwMiQb5pMsm7bXNwp/dkznBeNmWgL3yNXCKx0fSScKu5/fb9 m5IA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=xQd8MQoD; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id w7-20020a05622a134700b0041805eb9513si7377726qtk.31.2023.10.10.02.33.07 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 10 Oct 2023 02:33:07 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=xQd8MQoD; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qq95K-0002qp-Bz; Tue, 10 Oct 2023 05:31:26 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qq94v-0001N5-V0 for qemu-devel@nongnu.org; Tue, 10 Oct 2023 05:31:03 -0400 Received: from mail-ej1-x62e.google.com ([2a00:1450:4864:20::62e]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1qq94f-0008DV-S0 for qemu-devel@nongnu.org; Tue, 10 Oct 2023 05:30:58 -0400 Received: by mail-ej1-x62e.google.com with SMTP id a640c23a62f3a-9b9ad5760b9so919267166b.3 for ; Tue, 10 Oct 2023 02:30:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1696930244; x=1697535044; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=tGDIRmDFCC3SzHQp/xiOV97Tov37+momJ53r+jvT974=; b=xQd8MQoDOWF0fREbiwL/c5Kj62Jpbr9o33zDUjg1Rb8/MefzGDvunMEM3S4RltVzWu iuUY4Y6AxeZqXTRoaMehNG2v3/4YsyaVtwRuy/gZfr0oM2OK5ENTJU3dYzNe1rZW68Iv FDSBMGicR8G0j+hq6zcp4+iaDETtdJG8yfs+6R3oFmO3qBIIsn/zGLsI0iwATbQ6P+7q PL4ddaEbpVafWkzVxm/6eXsfVzcUNX4UBWGI7S/tt/hDqLLPcDIFKQ6KsuuyAOuHbmCO e5sIC7sQQ8oeK3F4n2B7bzPkxnjrYX872fnW5u7479lvVjMgyK1jN3LaK+IMC9kwfHvq nbnQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1696930244; x=1697535044; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=tGDIRmDFCC3SzHQp/xiOV97Tov37+momJ53r+jvT974=; b=qJ54Lx8i8ekf5c+7BgWEBrw75eUXvk5zdu9AotTHunjjEqhhePrhO5UmrFimoPK4fa JeQFkmRANI/otzAz2vhgaJex+ozzcIC0DBUQXGq4Rva6iiFyVoF0W46K3Ubr67sVcdGs QlLXeumX13avXSFELSslGWFrpYyAKtNRQOayyt5vtf/3vKJlpt1mu5cgDy7SHOV7xZWV eJuaVHo1ZQ17nWSsCwZy6pX9d2QtZW7lXVJnAr4owRJZJHE3+mCkNa5hIDl+cV4HqIKQ 0FRAwvDKmsZCvi5ydJDLwFFDzH8yXDODKU8gTg8aGfKkprmeyrr8+0jpoLF02ksGfu7y I8eQ== X-Gm-Message-State: AOJu0Yye6fp8c1hrNSixzCgFy1zMbRT6NbZFYlToGBtXyIkNt7If+oAb yNyNMSZTmIDcJqaLgvz5AFz+mi/KK/3M4LHkwCjqiw== X-Received: by 2002:a17:906:8a77:b0:9b3:308:d046 with SMTP id hy23-20020a1709068a7700b009b30308d046mr15417914ejc.61.1696930244444; Tue, 10 Oct 2023 02:30:44 -0700 (PDT) Received: from m1x-phil.lan (aif79-h01-176-172-113-148.dsl.sta.abo.bbox.fr. [176.172.113.148]) by smtp.gmail.com with ESMTPSA id st12-20020a170907c08c00b009b9f87b34b6sm6753332ejc.189.2023.10.10.02.30.40 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 10 Oct 2023 02:30:43 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: David Hildenbrand , "Michael S. Tsirkin" , Song Gao , =?utf-8?q?C=C3=A9dric_Le_Goater?= , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= , Laurent Vivier , Bastian Koppelmann , qemu-arm@nongnu.org, Jiaxun Yang , Ilya Leoshkevich , Yoshinori Sato , Paolo Bonzini , Weiwei Li , Nicholas Piggin , qemu-riscv@nongnu.org, "Edgar E. Iglesias" , Bin Meng , Yanan Wang , Palmer Dabbelt , Alistair Francis , Aleksandar Rikalo , Daniel Henrique Barboza , Marek Vasut , Peter Maydell , qemu-ppc@nongnu.org, Michael Rolnik , Max Filippov , Mark Cave-Ayland , Laurent Vivier , Stafford Horne , Thomas Huth , Chris Wulff , Sergio Lopez , Xiaojuan Yang , Richard Henderson , Liu Zhiwei , Artyom Tarasenko , Daniel Henrique Barboza , Eduardo Habkost , Brian Cain , Marcel Apfelbaum , Aurelien Jarno , qemu-s390x@nongnu.org Subject: [PATCH 12/18] target/mips: Declare CPU QOM types using DEFINE_TYPES() macro Date: Tue, 10 Oct 2023 11:28:54 +0200 Message-ID: <20231010092901.99189-13-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231010092901.99189-1-philmd@linaro.org> References: <20231010092901.99189-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::62e; envelope-from=philmd@linaro.org; helo=mail-ej1-x62e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org When multiple QOM types are registered in the same file, it is simpler to use the the DEFINE_TYPES() macro. In particular because type array declared with such macro are easier to review. In few commits we are going to add more types, so replace the type_register_static() to ease further reviews. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- target/mips/cpu.c | 23 +++++++++++++---------- 1 file changed, 13 insertions(+), 10 deletions(-) diff --git a/target/mips/cpu.c b/target/mips/cpu.c index a0023edd43..83ee54f766 100644 --- a/target/mips/cpu.c +++ b/target/mips/cpu.c @@ -595,17 +595,21 @@ static void mips_cpu_class_init(ObjectClass *c, void *data) #endif /* CONFIG_TCG */ } -static const TypeInfo mips_cpu_type_info = { - .name = TYPE_MIPS_CPU, - .parent = TYPE_CPU, - .instance_size = sizeof(MIPSCPU), - .instance_align = __alignof(MIPSCPU), - .instance_init = mips_cpu_initfn, - .abstract = true, - .class_size = sizeof(MIPSCPUClass), - .class_init = mips_cpu_class_init, +static const TypeInfo mips_cpu_types[] = { + { + .name = TYPE_MIPS_CPU, + .parent = TYPE_CPU, + .instance_size = sizeof(MIPSCPU), + .instance_align = __alignof(MIPSCPU), + .instance_init = mips_cpu_initfn, + .abstract = true, + .class_size = sizeof(MIPSCPUClass), + .class_init = mips_cpu_class_init, + } }; +DEFINE_TYPES(mips_cpu_types) + static void mips_cpu_cpudef_class_init(ObjectClass *oc, void *data) { MIPSCPUClass *mcc = MIPS_CPU_CLASS(oc); @@ -630,7 +634,6 @@ static void mips_cpu_register_types(void) { int i; - type_register_static(&mips_cpu_type_info); for (i = 0; i < mips_defs_number; i++) { mips_register_cpudef_type(&mips_defs[i]); }