diff mbox series

[04/18] target: Declare FOO_CPU_TYPE_NAME/SUFFIX in 'cpu-qom.h'

Message ID 20231010092901.99189-5-philmd@linaro.org
State Superseded
Headers show
Series target: Make 'cpu-qom.h' really target agnostic | expand

Commit Message

Philippe Mathieu-Daudé Oct. 10, 2023, 9:28 a.m. UTC
Hegerogeneous code needs access to the FOO_CPU_TYPE_NAME()
macro to resolve target CPU types. Move the declaration
(along with the required FOO_CPU_TYPE_SUFFIX) to "cpu-qom.h".

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 target/alpha/cpu-qom.h   | 5 ++++-
 target/alpha/cpu.h       | 2 --
 target/avr/cpu-qom.h     | 5 ++++-
 target/avr/cpu.h         | 2 --
 target/cris/cpu-qom.h    | 5 ++++-
 target/cris/cpu.h        | 2 --
 target/i386/cpu-qom.h    | 3 +++
 target/i386/cpu.h        | 2 --
 target/m68k/cpu-qom.h    | 5 ++++-
 target/m68k/cpu.h        | 2 --
 target/mips/cpu-qom.h    | 3 +++
 target/mips/cpu.h        | 2 --
 target/rx/cpu-qom.h      | 5 ++++-
 target/rx/cpu.h          | 2 --
 target/s390x/cpu-qom.h   | 5 ++++-
 target/s390x/cpu.h       | 2 --
 target/sh4/cpu-qom.h     | 5 ++++-
 target/sh4/cpu.h         | 2 --
 target/sparc/cpu-qom.h   | 5 ++++-
 target/sparc/cpu.h       | 2 --
 target/tricore/cpu-qom.h | 5 +++++
 target/tricore/cpu.h     | 2 --
 target/xtensa/cpu-qom.h  | 5 ++++-
 target/xtensa/cpu.h      | 2 --
 24 files changed, 47 insertions(+), 33 deletions(-)

Comments

LIU Zhiwei Oct. 11, 2023, 2:51 a.m. UTC | #1
On 2023/10/10 17:28, Philippe Mathieu-Daudé wrote:
> Hegerogeneous code needs access to the FOO_CPU_TYPE_NAME()
> macro to resolve target CPU types.

Hi Philippe,

I don't understand why should we use FOO_CPU_TYPE_NAME macro to resolve 
target CPU types? In my opinion, we should pass the
CPU typename from command line for heterogeneous case.

Could you make it clearer how should we use FOO_CPU_TYPE_NAME macro to 
resolve target CPU types in heterogeneous case?

Thanks,
Zhiwei

> Move the declaration
> (along with the required FOO_CPU_TYPE_SUFFIX) to "cpu-qom.h".
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
>   target/alpha/cpu-qom.h   | 5 ++++-
>   target/alpha/cpu.h       | 2 --
>   target/avr/cpu-qom.h     | 5 ++++-
>   target/avr/cpu.h         | 2 --
>   target/cris/cpu-qom.h    | 5 ++++-
>   target/cris/cpu.h        | 2 --
>   target/i386/cpu-qom.h    | 3 +++
>   target/i386/cpu.h        | 2 --
>   target/m68k/cpu-qom.h    | 5 ++++-
>   target/m68k/cpu.h        | 2 --
>   target/mips/cpu-qom.h    | 3 +++
>   target/mips/cpu.h        | 2 --
>   target/rx/cpu-qom.h      | 5 ++++-
>   target/rx/cpu.h          | 2 --
>   target/s390x/cpu-qom.h   | 5 ++++-
>   target/s390x/cpu.h       | 2 --
>   target/sh4/cpu-qom.h     | 5 ++++-
>   target/sh4/cpu.h         | 2 --
>   target/sparc/cpu-qom.h   | 5 ++++-
>   target/sparc/cpu.h       | 2 --
>   target/tricore/cpu-qom.h | 5 +++++
>   target/tricore/cpu.h     | 2 --
>   target/xtensa/cpu-qom.h  | 5 ++++-
>   target/xtensa/cpu.h      | 2 --
>   24 files changed, 47 insertions(+), 33 deletions(-)
>
> diff --git a/target/alpha/cpu-qom.h b/target/alpha/cpu-qom.h
> index 1f200724b6..d596d1b69f 100644
> --- a/target/alpha/cpu-qom.h
> +++ b/target/alpha/cpu-qom.h
> @@ -1,5 +1,5 @@
>   /*
> - * QEMU Alpha CPU
> + * QEMU Alpha CPU QOM header (target agnostic)
>    *
>    * Copyright (c) 2012 SUSE LINUX Products GmbH
>    *
> @@ -27,6 +27,9 @@
>   
>   OBJECT_DECLARE_CPU_TYPE(AlphaCPU, AlphaCPUClass, ALPHA_CPU)
>   
> +#define ALPHA_CPU_TYPE_SUFFIX "-" TYPE_ALPHA_CPU
> +#define ALPHA_CPU_TYPE_NAME(model) model ALPHA_CPU_TYPE_SUFFIX
> +
>   /**
>    * AlphaCPUClass:
>    * @parent_realize: The parent class' realize handler.
> diff --git a/target/alpha/cpu.h b/target/alpha/cpu.h
> index e2a467ec17..ba0d9e3468 100644
> --- a/target/alpha/cpu.h
> +++ b/target/alpha/cpu.h
> @@ -428,8 +428,6 @@ enum {
>   
>   void alpha_translate_init(void);
>   
> -#define ALPHA_CPU_TYPE_SUFFIX "-" TYPE_ALPHA_CPU
> -#define ALPHA_CPU_TYPE_NAME(model) model ALPHA_CPU_TYPE_SUFFIX
>   #define CPU_RESOLVING_TYPE TYPE_ALPHA_CPU
>   
>   void alpha_cpu_list(void);
> diff --git a/target/avr/cpu-qom.h b/target/avr/cpu-qom.h
> index 01ea5f160b..a810d6dc09 100644
> --- a/target/avr/cpu-qom.h
> +++ b/target/avr/cpu-qom.h
> @@ -1,5 +1,5 @@
>   /*
> - * QEMU AVR CPU
> + * QEMU AVR CPU QOM header (target agnostic)
>    *
>    * Copyright (c) 2016-2020 Michael Rolnik
>    *
> @@ -28,6 +28,9 @@
>   
>   OBJECT_DECLARE_CPU_TYPE(AVRCPU, AVRCPUClass, AVR_CPU)
>   
> +#define AVR_CPU_TYPE_SUFFIX "-" TYPE_AVR_CPU
> +#define AVR_CPU_TYPE_NAME(name) (name AVR_CPU_TYPE_SUFFIX)
> +
>   /**
>    *  AVRCPUClass:
>    *  @parent_realize: The parent class' realize handler.
> diff --git a/target/avr/cpu.h b/target/avr/cpu.h
> index 4ce22d8e4f..d3f0cc65d4 100644
> --- a/target/avr/cpu.h
> +++ b/target/avr/cpu.h
> @@ -28,8 +28,6 @@
>   #error "AVR 8-bit does not support user mode"
>   #endif
>   
> -#define AVR_CPU_TYPE_SUFFIX "-" TYPE_AVR_CPU
> -#define AVR_CPU_TYPE_NAME(name) (name AVR_CPU_TYPE_SUFFIX)
>   #define CPU_RESOLVING_TYPE TYPE_AVR_CPU
>   
>   #define TCG_GUEST_DEFAULT_MO 0
> diff --git a/target/cris/cpu-qom.h b/target/cris/cpu-qom.h
> index 431a1d536a..02a5b589b8 100644
> --- a/target/cris/cpu-qom.h
> +++ b/target/cris/cpu-qom.h
> @@ -1,5 +1,5 @@
>   /*
> - * QEMU CRIS CPU
> + * QEMU CRIS CPU QOM header (target agnostic)
>    *
>    * Copyright (c) 2012 SUSE LINUX Products GmbH
>    *
> @@ -27,6 +27,9 @@
>   
>   OBJECT_DECLARE_CPU_TYPE(CRISCPU, CRISCPUClass, CRIS_CPU)
>   
> +#define CRIS_CPU_TYPE_SUFFIX "-" TYPE_CRIS_CPU
> +#define CRIS_CPU_TYPE_NAME(name) (name CRIS_CPU_TYPE_SUFFIX)
> +
>   /**
>    * CRISCPUClass:
>    * @parent_realize: The parent class' realize handler.
> diff --git a/target/cris/cpu.h b/target/cris/cpu.h
> index 676b8e93ca..1af7ae5ef9 100644
> --- a/target/cris/cpu.h
> +++ b/target/cris/cpu.h
> @@ -242,8 +242,6 @@ enum {
>   /* CRIS uses 8k pages.  */
>   #define MMAP_SHIFT TARGET_PAGE_BITS
>   
> -#define CRIS_CPU_TYPE_SUFFIX "-" TYPE_CRIS_CPU
> -#define CRIS_CPU_TYPE_NAME(name) (name CRIS_CPU_TYPE_SUFFIX)
>   #define CPU_RESOLVING_TYPE TYPE_CRIS_CPU
>   
>   /* MMU modes definitions */
> diff --git a/target/i386/cpu-qom.h b/target/i386/cpu-qom.h
> index 2350f4ae60..78207c0a7c 100644
> --- a/target/i386/cpu-qom.h
> +++ b/target/i386/cpu-qom.h
> @@ -32,6 +32,9 @@
>   
>   OBJECT_DECLARE_CPU_TYPE(X86CPU, X86CPUClass, X86_CPU)
>   
> +#define X86_CPU_TYPE_SUFFIX "-" TYPE_X86_CPU
> +#define X86_CPU_TYPE_NAME(name) (name X86_CPU_TYPE_SUFFIX)
> +
>   typedef struct X86CPUModel X86CPUModel;
>   
>   /**
> diff --git a/target/i386/cpu.h b/target/i386/cpu.h
> index e1875466b9..862e4f1ff5 100644
> --- a/target/i386/cpu.h
> +++ b/target/i386/cpu.h
> @@ -2241,8 +2241,6 @@ void cpu_x86_update_dr7(CPUX86State *env, uint32_t new_dr7);
>   /* hw/pc.c */
>   uint64_t cpu_get_tsc(CPUX86State *env);
>   
> -#define X86_CPU_TYPE_SUFFIX "-" TYPE_X86_CPU
> -#define X86_CPU_TYPE_NAME(name) (name X86_CPU_TYPE_SUFFIX)
>   #define CPU_RESOLVING_TYPE TYPE_X86_CPU
>   
>   #ifdef TARGET_X86_64
> diff --git a/target/m68k/cpu-qom.h b/target/m68k/cpu-qom.h
> index 0ec7750a92..7192ecd71f 100644
> --- a/target/m68k/cpu-qom.h
> +++ b/target/m68k/cpu-qom.h
> @@ -1,5 +1,5 @@
>   /*
> - * QEMU Motorola 68k CPU
> + * QEMU Motorola 68k CPU QOM header (target agnostic)
>    *
>    * Copyright (c) 2012 SUSE LINUX Products GmbH
>    *
> @@ -27,6 +27,9 @@
>   
>   OBJECT_DECLARE_CPU_TYPE(M68kCPU, M68kCPUClass, M68K_CPU)
>   
> +#define M68K_CPU_TYPE_SUFFIX "-" TYPE_M68K_CPU
> +#define M68K_CPU_TYPE_NAME(model) model M68K_CPU_TYPE_SUFFIX
> +
>   /*
>    * M68kCPUClass:
>    * @parent_realize: The parent class' realize handler.
> diff --git a/target/m68k/cpu.h b/target/m68k/cpu.h
> index 20afb0c94d..ae144ebc2f 100644
> --- a/target/m68k/cpu.h
> +++ b/target/m68k/cpu.h
> @@ -563,8 +563,6 @@ enum {
>       ACCESS_DATA  = 0x20, /* Data load/store access        */
>   };
>   
> -#define M68K_CPU_TYPE_SUFFIX "-" TYPE_M68K_CPU
> -#define M68K_CPU_TYPE_NAME(model) model M68K_CPU_TYPE_SUFFIX
>   #define CPU_RESOLVING_TYPE TYPE_M68K_CPU
>   
>   #define cpu_list m68k_cpu_list
> diff --git a/target/mips/cpu-qom.h b/target/mips/cpu-qom.h
> index 0dffab453b..9c98ca1956 100644
> --- a/target/mips/cpu-qom.h
> +++ b/target/mips/cpu-qom.h
> @@ -31,6 +31,9 @@
>   
>   OBJECT_DECLARE_CPU_TYPE(MIPSCPU, MIPSCPUClass, MIPS_CPU)
>   
> +#define MIPS_CPU_TYPE_SUFFIX "-" TYPE_MIPS_CPU
> +#define MIPS_CPU_TYPE_NAME(model) model MIPS_CPU_TYPE_SUFFIX
> +
>   /**
>    * MIPSCPUClass:
>    * @parent_realize: The parent class' realize handler.
> diff --git a/target/mips/cpu.h b/target/mips/cpu.h
> index 5fddceff3a..6b026e6bcf 100644
> --- a/target/mips/cpu.h
> +++ b/target/mips/cpu.h
> @@ -1303,8 +1303,6 @@ enum {
>    */
>   #define CPU_INTERRUPT_WAKE CPU_INTERRUPT_TGT_INT_0
>   
> -#define MIPS_CPU_TYPE_SUFFIX "-" TYPE_MIPS_CPU
> -#define MIPS_CPU_TYPE_NAME(model) model MIPS_CPU_TYPE_SUFFIX
>   #define CPU_RESOLVING_TYPE TYPE_MIPS_CPU
>   
>   bool cpu_type_supports_cps_smp(const char *cpu_type);
> diff --git a/target/rx/cpu-qom.h b/target/rx/cpu-qom.h
> index 1c8466a187..99fe771534 100644
> --- a/target/rx/cpu-qom.h
> +++ b/target/rx/cpu-qom.h
> @@ -1,5 +1,5 @@
>   /*
> - * RX CPU
> + * QEMU RX CPU QOM header (target agnostic)
>    *
>    * Copyright (c) 2019 Yoshinori Sato
>    *
> @@ -28,6 +28,9 @@
>   
>   OBJECT_DECLARE_CPU_TYPE(RXCPU, RXCPUClass, RX_CPU)
>   
> +#define RX_CPU_TYPE_SUFFIX "-" TYPE_RX_CPU
> +#define RX_CPU_TYPE_NAME(model) model RX_CPU_TYPE_SUFFIX
> +
>   /*
>    * RXCPUClass:
>    * @parent_realize: The parent class' realize handler.
> diff --git a/target/rx/cpu.h b/target/rx/cpu.h
> index f66754eb8a..f89d88a37f 100644
> --- a/target/rx/cpu.h
> +++ b/target/rx/cpu.h
> @@ -114,8 +114,6 @@ struct ArchCPU {
>       CPURXState env;
>   };
>   
> -#define RX_CPU_TYPE_SUFFIX "-" TYPE_RX_CPU
> -#define RX_CPU_TYPE_NAME(model) model RX_CPU_TYPE_SUFFIX
>   #define CPU_RESOLVING_TYPE TYPE_RX_CPU
>   
>   const char *rx_crname(uint8_t cr);
> diff --git a/target/s390x/cpu-qom.h b/target/s390x/cpu-qom.h
> index 00cae2b131..463fe16386 100644
> --- a/target/s390x/cpu-qom.h
> +++ b/target/s390x/cpu-qom.h
> @@ -1,5 +1,5 @@
>   /*
> - * QEMU S/390 CPU
> + * QEMU S/390 CPU QOM header (target agnostic)
>    *
>    * Copyright (c) 2012 SUSE LINUX Products GmbH
>    *
> @@ -27,6 +27,9 @@
>   
>   OBJECT_DECLARE_CPU_TYPE(S390CPU, S390CPUClass, S390_CPU)
>   
> +#define S390_CPU_TYPE_SUFFIX "-" TYPE_S390_CPU
> +#define S390_CPU_TYPE_NAME(name) (name S390_CPU_TYPE_SUFFIX)
> +
>   typedef struct S390CPUModel S390CPUModel;
>   typedef struct S390CPUDef S390CPUDef;
>   
> diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h
> index 7bea7075e1..3e161862e5 100644
> --- a/target/s390x/cpu.h
> +++ b/target/s390x/cpu.h
> @@ -810,8 +810,6 @@ void s390_set_qemu_cpu_model(uint16_t type, uint8_t gen, uint8_t ec_ga,
>   
>   
>   /* helper.c */
> -#define S390_CPU_TYPE_SUFFIX "-" TYPE_S390_CPU
> -#define S390_CPU_TYPE_NAME(name) (name S390_CPU_TYPE_SUFFIX)
>   #define CPU_RESOLVING_TYPE TYPE_S390_CPU
>   
>   /* interrupt.c */
> diff --git a/target/sh4/cpu-qom.h b/target/sh4/cpu-qom.h
> index 89785a90f0..ed2de98949 100644
> --- a/target/sh4/cpu-qom.h
> +++ b/target/sh4/cpu-qom.h
> @@ -1,5 +1,5 @@
>   /*
> - * QEMU SuperH CPU
> + * QEMU SuperH CPU QOM header (target agnostic)
>    *
>    * Copyright (c) 2012 SUSE LINUX Products GmbH
>    *
> @@ -31,6 +31,9 @@
>   
>   OBJECT_DECLARE_CPU_TYPE(SuperHCPU, SuperHCPUClass, SUPERH_CPU)
>   
> +#define SUPERH_CPU_TYPE_SUFFIX "-" TYPE_SUPERH_CPU
> +#define SUPERH_CPU_TYPE_NAME(model) model SUPERH_CPU_TYPE_SUFFIX
> +
>   /**
>    * SuperHCPUClass:
>    * @parent_realize: The parent class' realize handler.
> diff --git a/target/sh4/cpu.h b/target/sh4/cpu.h
> index f75a235973..f44b3e5b25 100644
> --- a/target/sh4/cpu.h
> +++ b/target/sh4/cpu.h
> @@ -252,8 +252,6 @@ int cpu_sh4_is_cached(CPUSH4State * env, target_ulong addr);
>   
>   void cpu_load_tlb(CPUSH4State * env);
>   
> -#define SUPERH_CPU_TYPE_SUFFIX "-" TYPE_SUPERH_CPU
> -#define SUPERH_CPU_TYPE_NAME(model) model SUPERH_CPU_TYPE_SUFFIX
>   #define CPU_RESOLVING_TYPE TYPE_SUPERH_CPU
>   
>   #define cpu_list sh4_cpu_list
> diff --git a/target/sparc/cpu-qom.h b/target/sparc/cpu-qom.h
> index 78bf00b9a2..86b24a254a 100644
> --- a/target/sparc/cpu-qom.h
> +++ b/target/sparc/cpu-qom.h
> @@ -1,5 +1,5 @@
>   /*
> - * QEMU SPARC CPU
> + * QEMU SPARC CPU QOM header (target agnostic)
>    *
>    * Copyright (c) 2012 SUSE LINUX Products GmbH
>    *
> @@ -31,6 +31,9 @@
>   
>   OBJECT_DECLARE_CPU_TYPE(SPARCCPU, SPARCCPUClass, SPARC_CPU)
>   
> +#define SPARC_CPU_TYPE_SUFFIX "-" TYPE_SPARC_CPU
> +#define SPARC_CPU_TYPE_NAME(model) model SPARC_CPU_TYPE_SUFFIX
> +
>   typedef struct sparc_def_t sparc_def_t;
>   /**
>    * SPARCCPUClass:
> diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h
> index b3a98f1d74..924e83b9ce 100644
> --- a/target/sparc/cpu.h
> +++ b/target/sparc/cpu.h
> @@ -650,8 +650,6 @@ hwaddr cpu_get_phys_page_nofault(CPUSPARCState *env, target_ulong addr,
>   #endif
>   #endif
>   
> -#define SPARC_CPU_TYPE_SUFFIX "-" TYPE_SPARC_CPU
> -#define SPARC_CPU_TYPE_NAME(model) model SPARC_CPU_TYPE_SUFFIX
>   #define CPU_RESOLVING_TYPE TYPE_SPARC_CPU
>   
>   #define cpu_list sparc_cpu_list
> diff --git a/target/tricore/cpu-qom.h b/target/tricore/cpu-qom.h
> index 612731daa0..5368689bd9 100644
> --- a/target/tricore/cpu-qom.h
> +++ b/target/tricore/cpu-qom.h
> @@ -1,4 +1,6 @@
>   /*
> + * QEMU TriCore CPU QOM header (target agnostic)
> + *
>    *  Copyright (c) 2012-2014 Bastian Koppelmann C-Lab/University Paderborn
>    *
>    * This library is free software; you can redistribute it and/or
> @@ -26,6 +28,9 @@
>   
>   OBJECT_DECLARE_CPU_TYPE(TriCoreCPU, TriCoreCPUClass, TRICORE_CPU)
>   
> +#define TRICORE_CPU_TYPE_SUFFIX "-" TYPE_TRICORE_CPU
> +#define TRICORE_CPU_TYPE_NAME(model) model TRICORE_CPU_TYPE_SUFFIX
> +
>   struct TriCoreCPUClass {
>       /*< private >*/
>       CPUClass parent_class;
> diff --git a/target/tricore/cpu.h b/target/tricore/cpu.h
> index a357b573f2..fc09590a4f 100644
> --- a/target/tricore/cpu.h
> +++ b/target/tricore/cpu.h
> @@ -270,8 +270,6 @@ static inline void cpu_get_tb_cpu_state(CPUTriCoreState *env, vaddr *pc,
>       *flags = new_flags;
>   }
>   
> -#define TRICORE_CPU_TYPE_SUFFIX "-" TYPE_TRICORE_CPU
> -#define TRICORE_CPU_TYPE_NAME(model) model TRICORE_CPU_TYPE_SUFFIX
>   #define CPU_RESOLVING_TYPE TYPE_TRICORE_CPU
>   
>   /* helpers.c */
> diff --git a/target/xtensa/cpu-qom.h b/target/xtensa/cpu-qom.h
> index 419c7d8e4a..710ffa0403 100644
> --- a/target/xtensa/cpu-qom.h
> +++ b/target/xtensa/cpu-qom.h
> @@ -1,5 +1,5 @@
>   /*
> - * QEMU Xtensa CPU
> + * QEMU Xtensa CPU QOM header (target agnostic)
>    *
>    * Copyright (c) 2012 SUSE LINUX Products GmbH
>    * All rights reserved.
> @@ -36,6 +36,9 @@
>   
>   OBJECT_DECLARE_CPU_TYPE(XtensaCPU, XtensaCPUClass, XTENSA_CPU)
>   
> +#define XTENSA_CPU_TYPE_SUFFIX "-" TYPE_XTENSA_CPU
> +#define XTENSA_CPU_TYPE_NAME(model) model XTENSA_CPU_TYPE_SUFFIX
> +
>   typedef struct XtensaConfig XtensaConfig;
>   
>   /**
> diff --git a/target/xtensa/cpu.h b/target/xtensa/cpu.h
> index c6bbef1e5d..20ea6826e4 100644
> --- a/target/xtensa/cpu.h
> +++ b/target/xtensa/cpu.h
> @@ -588,8 +588,6 @@ G_NORETURN void xtensa_cpu_do_unaligned_access(CPUState *cpu, vaddr addr,
>   
>   #define cpu_list xtensa_cpu_list
>   
> -#define XTENSA_CPU_TYPE_SUFFIX "-" TYPE_XTENSA_CPU
> -#define XTENSA_CPU_TYPE_NAME(model) model XTENSA_CPU_TYPE_SUFFIX
>   #define CPU_RESOLVING_TYPE TYPE_XTENSA_CPU
>   
>   #if TARGET_BIG_ENDIAN
Philippe Mathieu-Daudé Oct. 11, 2023, 3:21 a.m. UTC | #2
Hi Zhiwei,

On 11/10/23 04:51, LIU Zhiwei wrote:
> 
> On 2023/10/10 17:28, Philippe Mathieu-Daudé wrote:
>> Hegerogeneous code needs access to the FOO_CPU_TYPE_NAME()
>> macro to resolve target CPU types.
> 
> Hi Philippe,
> 
> I don't understand why should we use FOO_CPU_TYPE_NAME macro to resolve 
> target CPU types? In my opinion, we should pass the
> CPU typename from command line for heterogeneous case.
> 
> Could you make it clearer how should we use FOO_CPU_TYPE_NAME macro to 
> resolve target CPU types in heterogeneous case?

To be honest I start to feel a bit lost with the "cpu
resolving type" design.

We are not quite there yet to "create from command line"
or "create from QMP", so I'm prototyping in plain C.
One of my test is:

   #include "target/arm/cpu-qom.h"
   #include "target/hexagon/cpu-qom.h"
   ...

   static void
   my_machine3_init((MachineState *machine)
   {
     CPUState cpu[2];
     ...

     cpu[0] = CPU(object_new(ARM_CPU_TYPE_NAME("cortex-a72")));
     cpu[1] = CPU(object_new(HEXAGON_CPU_TYPE_NAME("v68")));
     ...
   }

The machine code need access to the per-target
FOO_CPU_TYPE_NAME() macros. I'm not sure what each macro
expands to is considered stable, so IIUC I can't inline and use:

     cpu[0] = CPU(object_new("cortex-a72-arm-cpu"));
     cpu[1] = CPU(object_new("v68"-hexagon-cpu));

That said, maybe I'm mistaken.

Kinda related discussion with Gavin/Igor:
https://lore.kernel.org/qemu-devel/35653f53-a977-02ea-28f6-6fe85b1efd5a@redhat.com/
(related to 
https://lore.kernel.org/qemu-devel/20230907003553.1636896-1-gshan@redhat.com/).

> 
> Thanks,
> Zhiwei
> 
>> Move the declaration
>> (along with the required FOO_CPU_TYPE_SUFFIX) to "cpu-qom.h".
>>
>> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
>> ---
>>   target/alpha/cpu-qom.h   | 5 ++++-
>>   target/alpha/cpu.h       | 2 --
>>   target/avr/cpu-qom.h     | 5 ++++-
>>   target/avr/cpu.h         | 2 --
>>   target/cris/cpu-qom.h    | 5 ++++-
>>   target/cris/cpu.h        | 2 --
>>   target/i386/cpu-qom.h    | 3 +++
>>   target/i386/cpu.h        | 2 --
>>   target/m68k/cpu-qom.h    | 5 ++++-
>>   target/m68k/cpu.h        | 2 --
>>   target/mips/cpu-qom.h    | 3 +++
>>   target/mips/cpu.h        | 2 --
>>   target/rx/cpu-qom.h      | 5 ++++-
>>   target/rx/cpu.h          | 2 --
>>   target/s390x/cpu-qom.h   | 5 ++++-
>>   target/s390x/cpu.h       | 2 --
>>   target/sh4/cpu-qom.h     | 5 ++++-
>>   target/sh4/cpu.h         | 2 --
>>   target/sparc/cpu-qom.h   | 5 ++++-
>>   target/sparc/cpu.h       | 2 --
>>   target/tricore/cpu-qom.h | 5 +++++
>>   target/tricore/cpu.h     | 2 --
>>   target/xtensa/cpu-qom.h  | 5 ++++-
>>   target/xtensa/cpu.h      | 2 --
>>   24 files changed, 47 insertions(+), 33 deletions(-)
>>
>> diff --git a/target/alpha/cpu-qom.h b/target/alpha/cpu-qom.h
>> index 1f200724b6..d596d1b69f 100644
>> --- a/target/alpha/cpu-qom.h
>> +++ b/target/alpha/cpu-qom.h
>> @@ -1,5 +1,5 @@
>>   /*
>> - * QEMU Alpha CPU
>> + * QEMU Alpha CPU QOM header (target agnostic)
>>    *
>>    * Copyright (c) 2012 SUSE LINUX Products GmbH
>>    *
>> @@ -27,6 +27,9 @@
>>   OBJECT_DECLARE_CPU_TYPE(AlphaCPU, AlphaCPUClass, ALPHA_CPU)
>> +#define ALPHA_CPU_TYPE_SUFFIX "-" TYPE_ALPHA_CPU
>> +#define ALPHA_CPU_TYPE_NAME(model) model ALPHA_CPU_TYPE_SUFFIX
>> +
>>   /**
>>    * AlphaCPUClass:
>>    * @parent_realize: The parent class' realize handler.
>> diff --git a/target/alpha/cpu.h b/target/alpha/cpu.h
>> index e2a467ec17..ba0d9e3468 100644
>> --- a/target/alpha/cpu.h
>> +++ b/target/alpha/cpu.h
>> @@ -428,8 +428,6 @@ enum {
>>   void alpha_translate_init(void);
>> -#define ALPHA_CPU_TYPE_SUFFIX "-" TYPE_ALPHA_CPU
>> -#define ALPHA_CPU_TYPE_NAME(model) model ALPHA_CPU_TYPE_SUFFIX
>>   #define CPU_RESOLVING_TYPE TYPE_ALPHA_CPU
>>   void alpha_cpu_list(void);
[...]
LIU Zhiwei Oct. 11, 2023, 6:12 a.m. UTC | #3
On 2023/10/11 11:21, Philippe Mathieu-Daudé wrote:
> Hi Zhiwei,
>
> On 11/10/23 04:51, LIU Zhiwei wrote:
>>
>> On 2023/10/10 17:28, Philippe Mathieu-Daudé wrote:
>>> Hegerogeneous code needs access to the FOO_CPU_TYPE_NAME()
>>> macro to resolve target CPU types.
>>
>> Hi Philippe,
>>
>> I don't understand why should we use FOO_CPU_TYPE_NAME macro to 
>> resolve target CPU types? In my opinion, we should pass the
>> CPU typename from command line for heterogeneous case.
>>
>> Could you make it clearer how should we use FOO_CPU_TYPE_NAME macro 
>> to resolve target CPU types in heterogeneous case?
>
> To be honest I start to feel a bit lost with the "cpu
> resolving type" design.
>
> We are not quite there yet to "create from command line"
> or "create from QMP", so I'm prototyping in plain C.
> One of my test is:
>
>   #include "target/arm/cpu-qom.h"
>   #include "target/hexagon/cpu-qom.h"
>   ...
>
>   static void
>   my_machine3_init((MachineState *machine)
>   {
>     CPUState cpu[2];
>     ...
>
>     cpu[0] = CPU(object_new(ARM_CPU_TYPE_NAME("cortex-a72")));
>     cpu[1] = CPU(object_new(HEXAGON_CPU_TYPE_NAME("v68")));
>     ...
>   }
>
> The machine code need access to the per-target
> FOO_CPU_TYPE_NAME() macros. 

I see what you mean. It works if we will pass the cpu model instead of 
cpu typename to the machine state(Not yet).

Acked-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>

Zhiwei

> I'm not sure what each macro
> expands to is considered stable, so IIUC I can't inline and use:
>
>     cpu[0] = CPU(object_new("cortex-a72-arm-cpu"));
>     cpu[1] = CPU(object_new("v68"-hexagon-cpu));
>
> That said, maybe I'm mistaken.
>
> Kinda related discussion with Gavin/Igor:
> https://lore.kernel.org/qemu-devel/35653f53-a977-02ea-28f6-6fe85b1efd5a@redhat.com/ 
>
> (related to 
> https://lore.kernel.org/qemu-devel/20230907003553.1636896-1-gshan@redhat.com/).
>
>>
>> Thanks,
>> Zhiwei
>>
>>> Move the declaration
>>> (along with the required FOO_CPU_TYPE_SUFFIX) to "cpu-qom.h".
>>>
>>> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
>>> ---
>>>   target/alpha/cpu-qom.h   | 5 ++++-
>>>   target/alpha/cpu.h       | 2 --
>>>   target/avr/cpu-qom.h     | 5 ++++-
>>>   target/avr/cpu.h         | 2 --
>>>   target/cris/cpu-qom.h    | 5 ++++-
>>>   target/cris/cpu.h        | 2 --
>>>   target/i386/cpu-qom.h    | 3 +++
>>>   target/i386/cpu.h        | 2 --
>>>   target/m68k/cpu-qom.h    | 5 ++++-
>>>   target/m68k/cpu.h        | 2 --
>>>   target/mips/cpu-qom.h    | 3 +++
>>>   target/mips/cpu.h        | 2 --
>>>   target/rx/cpu-qom.h      | 5 ++++-
>>>   target/rx/cpu.h          | 2 --
>>>   target/s390x/cpu-qom.h   | 5 ++++-
>>>   target/s390x/cpu.h       | 2 --
>>>   target/sh4/cpu-qom.h     | 5 ++++-
>>>   target/sh4/cpu.h         | 2 --
>>>   target/sparc/cpu-qom.h   | 5 ++++-
>>>   target/sparc/cpu.h       | 2 --
>>>   target/tricore/cpu-qom.h | 5 +++++
>>>   target/tricore/cpu.h     | 2 --
>>>   target/xtensa/cpu-qom.h  | 5 ++++-
>>>   target/xtensa/cpu.h      | 2 --
>>>   24 files changed, 47 insertions(+), 33 deletions(-)
>>>
>>> diff --git a/target/alpha/cpu-qom.h b/target/alpha/cpu-qom.h
>>> index 1f200724b6..d596d1b69f 100644
>>> --- a/target/alpha/cpu-qom.h
>>> +++ b/target/alpha/cpu-qom.h
>>> @@ -1,5 +1,5 @@
>>>   /*
>>> - * QEMU Alpha CPU
>>> + * QEMU Alpha CPU QOM header (target agnostic)
>>>    *
>>>    * Copyright (c) 2012 SUSE LINUX Products GmbH
>>>    *
>>> @@ -27,6 +27,9 @@
>>>   OBJECT_DECLARE_CPU_TYPE(AlphaCPU, AlphaCPUClass, ALPHA_CPU)
>>> +#define ALPHA_CPU_TYPE_SUFFIX "-" TYPE_ALPHA_CPU
>>> +#define ALPHA_CPU_TYPE_NAME(model) model ALPHA_CPU_TYPE_SUFFIX
>>> +
>>>   /**
>>>    * AlphaCPUClass:
>>>    * @parent_realize: The parent class' realize handler.
>>> diff --git a/target/alpha/cpu.h b/target/alpha/cpu.h
>>> index e2a467ec17..ba0d9e3468 100644
>>> --- a/target/alpha/cpu.h
>>> +++ b/target/alpha/cpu.h
>>> @@ -428,8 +428,6 @@ enum {
>>>   void alpha_translate_init(void);
>>> -#define ALPHA_CPU_TYPE_SUFFIX "-" TYPE_ALPHA_CPU
>>> -#define ALPHA_CPU_TYPE_NAME(model) model ALPHA_CPU_TYPE_SUFFIX
>>>   #define CPU_RESOLVING_TYPE TYPE_ALPHA_CPU
>>>   void alpha_cpu_list(void);
> [...]
Richard Henderson Oct. 13, 2023, 4:02 a.m. UTC | #4
On 10/10/23 02:28, Philippe Mathieu-Daudé wrote:
> Hegerogeneous code needs access to the FOO_CPU_TYPE_NAME()
> macro to resolve target CPU types. Move the declaration
> (along with the required FOO_CPU_TYPE_SUFFIX) to "cpu-qom.h".
> 
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
>   target/alpha/cpu-qom.h   | 5 ++++-
>   target/alpha/cpu.h       | 2 --
>   target/avr/cpu-qom.h     | 5 ++++-
>   target/avr/cpu.h         | 2 --
>   target/cris/cpu-qom.h    | 5 ++++-
>   target/cris/cpu.h        | 2 --
>   target/i386/cpu-qom.h    | 3 +++
>   target/i386/cpu.h        | 2 --
>   target/m68k/cpu-qom.h    | 5 ++++-
>   target/m68k/cpu.h        | 2 --
>   target/mips/cpu-qom.h    | 3 +++
>   target/mips/cpu.h        | 2 --
>   target/rx/cpu-qom.h      | 5 ++++-
>   target/rx/cpu.h          | 2 --
>   target/s390x/cpu-qom.h   | 5 ++++-
>   target/s390x/cpu.h       | 2 --
>   target/sh4/cpu-qom.h     | 5 ++++-
>   target/sh4/cpu.h         | 2 --
>   target/sparc/cpu-qom.h   | 5 ++++-
>   target/sparc/cpu.h       | 2 --
>   target/tricore/cpu-qom.h | 5 +++++
>   target/tricore/cpu.h     | 2 --
>   target/xtensa/cpu-qom.h  | 5 ++++-
>   target/xtensa/cpu.h      | 2 --
>   24 files changed, 47 insertions(+), 33 deletions(-)

Seems ok.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


r~
diff mbox series

Patch

diff --git a/target/alpha/cpu-qom.h b/target/alpha/cpu-qom.h
index 1f200724b6..d596d1b69f 100644
--- a/target/alpha/cpu-qom.h
+++ b/target/alpha/cpu-qom.h
@@ -1,5 +1,5 @@ 
 /*
- * QEMU Alpha CPU
+ * QEMU Alpha CPU QOM header (target agnostic)
  *
  * Copyright (c) 2012 SUSE LINUX Products GmbH
  *
@@ -27,6 +27,9 @@ 
 
 OBJECT_DECLARE_CPU_TYPE(AlphaCPU, AlphaCPUClass, ALPHA_CPU)
 
+#define ALPHA_CPU_TYPE_SUFFIX "-" TYPE_ALPHA_CPU
+#define ALPHA_CPU_TYPE_NAME(model) model ALPHA_CPU_TYPE_SUFFIX
+
 /**
  * AlphaCPUClass:
  * @parent_realize: The parent class' realize handler.
diff --git a/target/alpha/cpu.h b/target/alpha/cpu.h
index e2a467ec17..ba0d9e3468 100644
--- a/target/alpha/cpu.h
+++ b/target/alpha/cpu.h
@@ -428,8 +428,6 @@  enum {
 
 void alpha_translate_init(void);
 
-#define ALPHA_CPU_TYPE_SUFFIX "-" TYPE_ALPHA_CPU
-#define ALPHA_CPU_TYPE_NAME(model) model ALPHA_CPU_TYPE_SUFFIX
 #define CPU_RESOLVING_TYPE TYPE_ALPHA_CPU
 
 void alpha_cpu_list(void);
diff --git a/target/avr/cpu-qom.h b/target/avr/cpu-qom.h
index 01ea5f160b..a810d6dc09 100644
--- a/target/avr/cpu-qom.h
+++ b/target/avr/cpu-qom.h
@@ -1,5 +1,5 @@ 
 /*
- * QEMU AVR CPU
+ * QEMU AVR CPU QOM header (target agnostic)
  *
  * Copyright (c) 2016-2020 Michael Rolnik
  *
@@ -28,6 +28,9 @@ 
 
 OBJECT_DECLARE_CPU_TYPE(AVRCPU, AVRCPUClass, AVR_CPU)
 
+#define AVR_CPU_TYPE_SUFFIX "-" TYPE_AVR_CPU
+#define AVR_CPU_TYPE_NAME(name) (name AVR_CPU_TYPE_SUFFIX)
+
 /**
  *  AVRCPUClass:
  *  @parent_realize: The parent class' realize handler.
diff --git a/target/avr/cpu.h b/target/avr/cpu.h
index 4ce22d8e4f..d3f0cc65d4 100644
--- a/target/avr/cpu.h
+++ b/target/avr/cpu.h
@@ -28,8 +28,6 @@ 
 #error "AVR 8-bit does not support user mode"
 #endif
 
-#define AVR_CPU_TYPE_SUFFIX "-" TYPE_AVR_CPU
-#define AVR_CPU_TYPE_NAME(name) (name AVR_CPU_TYPE_SUFFIX)
 #define CPU_RESOLVING_TYPE TYPE_AVR_CPU
 
 #define TCG_GUEST_DEFAULT_MO 0
diff --git a/target/cris/cpu-qom.h b/target/cris/cpu-qom.h
index 431a1d536a..02a5b589b8 100644
--- a/target/cris/cpu-qom.h
+++ b/target/cris/cpu-qom.h
@@ -1,5 +1,5 @@ 
 /*
- * QEMU CRIS CPU
+ * QEMU CRIS CPU QOM header (target agnostic)
  *
  * Copyright (c) 2012 SUSE LINUX Products GmbH
  *
@@ -27,6 +27,9 @@ 
 
 OBJECT_DECLARE_CPU_TYPE(CRISCPU, CRISCPUClass, CRIS_CPU)
 
+#define CRIS_CPU_TYPE_SUFFIX "-" TYPE_CRIS_CPU
+#define CRIS_CPU_TYPE_NAME(name) (name CRIS_CPU_TYPE_SUFFIX)
+
 /**
  * CRISCPUClass:
  * @parent_realize: The parent class' realize handler.
diff --git a/target/cris/cpu.h b/target/cris/cpu.h
index 676b8e93ca..1af7ae5ef9 100644
--- a/target/cris/cpu.h
+++ b/target/cris/cpu.h
@@ -242,8 +242,6 @@  enum {
 /* CRIS uses 8k pages.  */
 #define MMAP_SHIFT TARGET_PAGE_BITS
 
-#define CRIS_CPU_TYPE_SUFFIX "-" TYPE_CRIS_CPU
-#define CRIS_CPU_TYPE_NAME(name) (name CRIS_CPU_TYPE_SUFFIX)
 #define CPU_RESOLVING_TYPE TYPE_CRIS_CPU
 
 /* MMU modes definitions */
diff --git a/target/i386/cpu-qom.h b/target/i386/cpu-qom.h
index 2350f4ae60..78207c0a7c 100644
--- a/target/i386/cpu-qom.h
+++ b/target/i386/cpu-qom.h
@@ -32,6 +32,9 @@ 
 
 OBJECT_DECLARE_CPU_TYPE(X86CPU, X86CPUClass, X86_CPU)
 
+#define X86_CPU_TYPE_SUFFIX "-" TYPE_X86_CPU
+#define X86_CPU_TYPE_NAME(name) (name X86_CPU_TYPE_SUFFIX)
+
 typedef struct X86CPUModel X86CPUModel;
 
 /**
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index e1875466b9..862e4f1ff5 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -2241,8 +2241,6 @@  void cpu_x86_update_dr7(CPUX86State *env, uint32_t new_dr7);
 /* hw/pc.c */
 uint64_t cpu_get_tsc(CPUX86State *env);
 
-#define X86_CPU_TYPE_SUFFIX "-" TYPE_X86_CPU
-#define X86_CPU_TYPE_NAME(name) (name X86_CPU_TYPE_SUFFIX)
 #define CPU_RESOLVING_TYPE TYPE_X86_CPU
 
 #ifdef TARGET_X86_64
diff --git a/target/m68k/cpu-qom.h b/target/m68k/cpu-qom.h
index 0ec7750a92..7192ecd71f 100644
--- a/target/m68k/cpu-qom.h
+++ b/target/m68k/cpu-qom.h
@@ -1,5 +1,5 @@ 
 /*
- * QEMU Motorola 68k CPU
+ * QEMU Motorola 68k CPU QOM header (target agnostic)
  *
  * Copyright (c) 2012 SUSE LINUX Products GmbH
  *
@@ -27,6 +27,9 @@ 
 
 OBJECT_DECLARE_CPU_TYPE(M68kCPU, M68kCPUClass, M68K_CPU)
 
+#define M68K_CPU_TYPE_SUFFIX "-" TYPE_M68K_CPU
+#define M68K_CPU_TYPE_NAME(model) model M68K_CPU_TYPE_SUFFIX
+
 /*
  * M68kCPUClass:
  * @parent_realize: The parent class' realize handler.
diff --git a/target/m68k/cpu.h b/target/m68k/cpu.h
index 20afb0c94d..ae144ebc2f 100644
--- a/target/m68k/cpu.h
+++ b/target/m68k/cpu.h
@@ -563,8 +563,6 @@  enum {
     ACCESS_DATA  = 0x20, /* Data load/store access        */
 };
 
-#define M68K_CPU_TYPE_SUFFIX "-" TYPE_M68K_CPU
-#define M68K_CPU_TYPE_NAME(model) model M68K_CPU_TYPE_SUFFIX
 #define CPU_RESOLVING_TYPE TYPE_M68K_CPU
 
 #define cpu_list m68k_cpu_list
diff --git a/target/mips/cpu-qom.h b/target/mips/cpu-qom.h
index 0dffab453b..9c98ca1956 100644
--- a/target/mips/cpu-qom.h
+++ b/target/mips/cpu-qom.h
@@ -31,6 +31,9 @@ 
 
 OBJECT_DECLARE_CPU_TYPE(MIPSCPU, MIPSCPUClass, MIPS_CPU)
 
+#define MIPS_CPU_TYPE_SUFFIX "-" TYPE_MIPS_CPU
+#define MIPS_CPU_TYPE_NAME(model) model MIPS_CPU_TYPE_SUFFIX
+
 /**
  * MIPSCPUClass:
  * @parent_realize: The parent class' realize handler.
diff --git a/target/mips/cpu.h b/target/mips/cpu.h
index 5fddceff3a..6b026e6bcf 100644
--- a/target/mips/cpu.h
+++ b/target/mips/cpu.h
@@ -1303,8 +1303,6 @@  enum {
  */
 #define CPU_INTERRUPT_WAKE CPU_INTERRUPT_TGT_INT_0
 
-#define MIPS_CPU_TYPE_SUFFIX "-" TYPE_MIPS_CPU
-#define MIPS_CPU_TYPE_NAME(model) model MIPS_CPU_TYPE_SUFFIX
 #define CPU_RESOLVING_TYPE TYPE_MIPS_CPU
 
 bool cpu_type_supports_cps_smp(const char *cpu_type);
diff --git a/target/rx/cpu-qom.h b/target/rx/cpu-qom.h
index 1c8466a187..99fe771534 100644
--- a/target/rx/cpu-qom.h
+++ b/target/rx/cpu-qom.h
@@ -1,5 +1,5 @@ 
 /*
- * RX CPU
+ * QEMU RX CPU QOM header (target agnostic)
  *
  * Copyright (c) 2019 Yoshinori Sato
  *
@@ -28,6 +28,9 @@ 
 
 OBJECT_DECLARE_CPU_TYPE(RXCPU, RXCPUClass, RX_CPU)
 
+#define RX_CPU_TYPE_SUFFIX "-" TYPE_RX_CPU
+#define RX_CPU_TYPE_NAME(model) model RX_CPU_TYPE_SUFFIX
+
 /*
  * RXCPUClass:
  * @parent_realize: The parent class' realize handler.
diff --git a/target/rx/cpu.h b/target/rx/cpu.h
index f66754eb8a..f89d88a37f 100644
--- a/target/rx/cpu.h
+++ b/target/rx/cpu.h
@@ -114,8 +114,6 @@  struct ArchCPU {
     CPURXState env;
 };
 
-#define RX_CPU_TYPE_SUFFIX "-" TYPE_RX_CPU
-#define RX_CPU_TYPE_NAME(model) model RX_CPU_TYPE_SUFFIX
 #define CPU_RESOLVING_TYPE TYPE_RX_CPU
 
 const char *rx_crname(uint8_t cr);
diff --git a/target/s390x/cpu-qom.h b/target/s390x/cpu-qom.h
index 00cae2b131..463fe16386 100644
--- a/target/s390x/cpu-qom.h
+++ b/target/s390x/cpu-qom.h
@@ -1,5 +1,5 @@ 
 /*
- * QEMU S/390 CPU
+ * QEMU S/390 CPU QOM header (target agnostic)
  *
  * Copyright (c) 2012 SUSE LINUX Products GmbH
  *
@@ -27,6 +27,9 @@ 
 
 OBJECT_DECLARE_CPU_TYPE(S390CPU, S390CPUClass, S390_CPU)
 
+#define S390_CPU_TYPE_SUFFIX "-" TYPE_S390_CPU
+#define S390_CPU_TYPE_NAME(name) (name S390_CPU_TYPE_SUFFIX)
+
 typedef struct S390CPUModel S390CPUModel;
 typedef struct S390CPUDef S390CPUDef;
 
diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h
index 7bea7075e1..3e161862e5 100644
--- a/target/s390x/cpu.h
+++ b/target/s390x/cpu.h
@@ -810,8 +810,6 @@  void s390_set_qemu_cpu_model(uint16_t type, uint8_t gen, uint8_t ec_ga,
 
 
 /* helper.c */
-#define S390_CPU_TYPE_SUFFIX "-" TYPE_S390_CPU
-#define S390_CPU_TYPE_NAME(name) (name S390_CPU_TYPE_SUFFIX)
 #define CPU_RESOLVING_TYPE TYPE_S390_CPU
 
 /* interrupt.c */
diff --git a/target/sh4/cpu-qom.h b/target/sh4/cpu-qom.h
index 89785a90f0..ed2de98949 100644
--- a/target/sh4/cpu-qom.h
+++ b/target/sh4/cpu-qom.h
@@ -1,5 +1,5 @@ 
 /*
- * QEMU SuperH CPU
+ * QEMU SuperH CPU QOM header (target agnostic)
  *
  * Copyright (c) 2012 SUSE LINUX Products GmbH
  *
@@ -31,6 +31,9 @@ 
 
 OBJECT_DECLARE_CPU_TYPE(SuperHCPU, SuperHCPUClass, SUPERH_CPU)
 
+#define SUPERH_CPU_TYPE_SUFFIX "-" TYPE_SUPERH_CPU
+#define SUPERH_CPU_TYPE_NAME(model) model SUPERH_CPU_TYPE_SUFFIX
+
 /**
  * SuperHCPUClass:
  * @parent_realize: The parent class' realize handler.
diff --git a/target/sh4/cpu.h b/target/sh4/cpu.h
index f75a235973..f44b3e5b25 100644
--- a/target/sh4/cpu.h
+++ b/target/sh4/cpu.h
@@ -252,8 +252,6 @@  int cpu_sh4_is_cached(CPUSH4State * env, target_ulong addr);
 
 void cpu_load_tlb(CPUSH4State * env);
 
-#define SUPERH_CPU_TYPE_SUFFIX "-" TYPE_SUPERH_CPU
-#define SUPERH_CPU_TYPE_NAME(model) model SUPERH_CPU_TYPE_SUFFIX
 #define CPU_RESOLVING_TYPE TYPE_SUPERH_CPU
 
 #define cpu_list sh4_cpu_list
diff --git a/target/sparc/cpu-qom.h b/target/sparc/cpu-qom.h
index 78bf00b9a2..86b24a254a 100644
--- a/target/sparc/cpu-qom.h
+++ b/target/sparc/cpu-qom.h
@@ -1,5 +1,5 @@ 
 /*
- * QEMU SPARC CPU
+ * QEMU SPARC CPU QOM header (target agnostic)
  *
  * Copyright (c) 2012 SUSE LINUX Products GmbH
  *
@@ -31,6 +31,9 @@ 
 
 OBJECT_DECLARE_CPU_TYPE(SPARCCPU, SPARCCPUClass, SPARC_CPU)
 
+#define SPARC_CPU_TYPE_SUFFIX "-" TYPE_SPARC_CPU
+#define SPARC_CPU_TYPE_NAME(model) model SPARC_CPU_TYPE_SUFFIX
+
 typedef struct sparc_def_t sparc_def_t;
 /**
  * SPARCCPUClass:
diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h
index b3a98f1d74..924e83b9ce 100644
--- a/target/sparc/cpu.h
+++ b/target/sparc/cpu.h
@@ -650,8 +650,6 @@  hwaddr cpu_get_phys_page_nofault(CPUSPARCState *env, target_ulong addr,
 #endif
 #endif
 
-#define SPARC_CPU_TYPE_SUFFIX "-" TYPE_SPARC_CPU
-#define SPARC_CPU_TYPE_NAME(model) model SPARC_CPU_TYPE_SUFFIX
 #define CPU_RESOLVING_TYPE TYPE_SPARC_CPU
 
 #define cpu_list sparc_cpu_list
diff --git a/target/tricore/cpu-qom.h b/target/tricore/cpu-qom.h
index 612731daa0..5368689bd9 100644
--- a/target/tricore/cpu-qom.h
+++ b/target/tricore/cpu-qom.h
@@ -1,4 +1,6 @@ 
 /*
+ * QEMU TriCore CPU QOM header (target agnostic)
+ *
  *  Copyright (c) 2012-2014 Bastian Koppelmann C-Lab/University Paderborn
  *
  * This library is free software; you can redistribute it and/or
@@ -26,6 +28,9 @@ 
 
 OBJECT_DECLARE_CPU_TYPE(TriCoreCPU, TriCoreCPUClass, TRICORE_CPU)
 
+#define TRICORE_CPU_TYPE_SUFFIX "-" TYPE_TRICORE_CPU
+#define TRICORE_CPU_TYPE_NAME(model) model TRICORE_CPU_TYPE_SUFFIX
+
 struct TriCoreCPUClass {
     /*< private >*/
     CPUClass parent_class;
diff --git a/target/tricore/cpu.h b/target/tricore/cpu.h
index a357b573f2..fc09590a4f 100644
--- a/target/tricore/cpu.h
+++ b/target/tricore/cpu.h
@@ -270,8 +270,6 @@  static inline void cpu_get_tb_cpu_state(CPUTriCoreState *env, vaddr *pc,
     *flags = new_flags;
 }
 
-#define TRICORE_CPU_TYPE_SUFFIX "-" TYPE_TRICORE_CPU
-#define TRICORE_CPU_TYPE_NAME(model) model TRICORE_CPU_TYPE_SUFFIX
 #define CPU_RESOLVING_TYPE TYPE_TRICORE_CPU
 
 /* helpers.c */
diff --git a/target/xtensa/cpu-qom.h b/target/xtensa/cpu-qom.h
index 419c7d8e4a..710ffa0403 100644
--- a/target/xtensa/cpu-qom.h
+++ b/target/xtensa/cpu-qom.h
@@ -1,5 +1,5 @@ 
 /*
- * QEMU Xtensa CPU
+ * QEMU Xtensa CPU QOM header (target agnostic)
  *
  * Copyright (c) 2012 SUSE LINUX Products GmbH
  * All rights reserved.
@@ -36,6 +36,9 @@ 
 
 OBJECT_DECLARE_CPU_TYPE(XtensaCPU, XtensaCPUClass, XTENSA_CPU)
 
+#define XTENSA_CPU_TYPE_SUFFIX "-" TYPE_XTENSA_CPU
+#define XTENSA_CPU_TYPE_NAME(model) model XTENSA_CPU_TYPE_SUFFIX
+
 typedef struct XtensaConfig XtensaConfig;
 
 /**
diff --git a/target/xtensa/cpu.h b/target/xtensa/cpu.h
index c6bbef1e5d..20ea6826e4 100644
--- a/target/xtensa/cpu.h
+++ b/target/xtensa/cpu.h
@@ -588,8 +588,6 @@  G_NORETURN void xtensa_cpu_do_unaligned_access(CPUState *cpu, vaddr addr,
 
 #define cpu_list xtensa_cpu_list
 
-#define XTENSA_CPU_TYPE_SUFFIX "-" TYPE_XTENSA_CPU
-#define XTENSA_CPU_TYPE_NAME(model) model XTENSA_CPU_TYPE_SUFFIX
 #define CPU_RESOLVING_TYPE TYPE_XTENSA_CPU
 
 #if TARGET_BIG_ENDIAN