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([71.212.149.95]) by smtp.gmail.com with ESMTPSA id jf4-20020a170903268400b001ca21e05c69sm629150plb.109.2023.10.16.23.13.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 16 Oct 2023 23:13:17 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: mark.cave-ayland@ilande.co.uk Subject: [PATCH v2 39/90] target/sparc: Move POPC to decodetree Date: Mon, 16 Oct 2023 23:11:53 -0700 Message-Id: <20231017061244.681584-40-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231017061244.681584-1-richard.henderson@linaro.org> References: <20231017061244.681584-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::62e; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 1 + target/sparc/translate.c | 55 ++++++--------------------------------- 2 files changed, 9 insertions(+), 47 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index a61d10be5a..0c1517f024 100644 --- a/target/sparc/insns.decode +++ b/target/sparc/insns.decode @@ -189,6 +189,7 @@ TSUBcc 10 ..... 100001 ..... . ............. @r_r_ri TADDccTV 10 ..... 100010 ..... . ............. @r_r_ri TSUBccTV 10 ..... 100011 ..... . ............. @r_r_ri MULScc 10 ..... 100100 ..... . ............. @r_r_ri +POPC 10 rd:5 101110 00000 imm:1 rs2_or_imm:s13 &r_r_ri rs1=0 &shiftr rd rs1 rs2 x:bool @shiftr .. rd:5 ...... rs1:5 . x:1 ....... rs2:5 &shiftr diff --git a/target/sparc/translate.c b/target/sparc/translate.c index 0b0b9aa8d3..75a2de764e 100644 --- a/target/sparc/translate.c +++ b/target/sparc/translate.c @@ -685,6 +685,11 @@ static void gen_op_tsubcctv(TCGv dst, TCGv src1, TCGv src2) gen_helper_tsubcctv(dst, tcg_env, src1, src2); } +static void gen_op_popc(TCGv dst, TCGv src1, TCGv src2) +{ + tcg_gen_ctpop_tl(dst, src2); +} + // 1 static void gen_op_eval_ba(TCGv dst) { @@ -2678,19 +2683,6 @@ static TCGv get_src1(DisasContext *dc, unsigned int insn) return gen_load_gpr(dc, rs1); } -static TCGv get_src2(DisasContext *dc, unsigned int insn) -{ - if (IS_IMM) { /* immediate */ - target_long simm = GET_FIELDs(insn, 19, 31); - TCGv t = tcg_temp_new(); - tcg_gen_movi_tl(t, simm); - return t; - } else { /* register */ - unsigned int rs2 = GET_FIELD(insn, 27, 31); - return gen_load_gpr(dc, rs2); - } -} - #ifdef TARGET_SPARC64 static void gen_fmovs(DisasContext *dc, DisasCompare *cmp, int rd, int rs) { @@ -4245,6 +4237,8 @@ TRANS(UDIVX, 64, do_arith, a, gen_op_udivx, NULL) TRANS(SDIVX, 64, do_arith, a, gen_op_sdivx, NULL) TRANS(UDIV, DIV, do_arith, a, gen_op_udiv, NULL) TRANS(SDIV, DIV, do_arith, a, gen_op_sdiv, NULL) +/* TODO: Should have feature bit -- comes in with UltraSparc T2. */ +TRANS(POPC, 64, do_arith, a, gen_op_popc, NULL) TRANS(ADDcc, ALL, do_cc_arith, a, CC_OP_ADD, gen_op_add_cc, NULL) TRANS(ANDcc, ALL, do_cc_arith, a, CC_OP_LOGIC, tcg_gen_and_tl, tcg_gen_andi_tl) @@ -4801,40 +4795,7 @@ static void disas_sparc_legacy(DisasContext *dc, unsigned int insn) goto illegal_insn; } } else if (xop < 0x36) { - if (xop < 0x20) { - goto illegal_insn; - } else { - cpu_src1 = get_src1(dc, insn); - cpu_src2 = get_src2(dc, insn); - switch (xop) { - case 0x20: /* taddcc */ - case 0x21: /* tsubcc */ - case 0x22: /* taddcctv */ - case 0x23: /* tsubcctv */ - case 0x24: /* mulscc */ - case 0x25: /* sll */ - case 0x26: /* srl */ - case 0x27: /* sra */ - goto illegal_insn; /* in decodetree */ - case 0x30: - goto illegal_insn; /* WRASR in decodetree */ - case 0x32: - goto illegal_insn; /* WRPR in decodetree */ - case 0x33: /* wrtbr, UA2005 wrhpr */ - goto illegal_insn; /* WRTBR, WRHPR in decodetree */ -#ifdef TARGET_SPARC64 - case 0x2c: /* V9 movcc */ - case 0x2f: /* V9 movr */ - goto illegal_insn; /* in decodetree */ - case 0x2e: /* V9 popc */ - tcg_gen_ctpop_tl(cpu_dst, cpu_src2); - gen_store_gpr(dc, rd, cpu_dst); - break; -#endif - default: - goto illegal_insn; - } - } + goto illegal_insn; /* in decodetree */ } else if (xop == 0x36) { /* UltraSparc shutdown, VIS, V8 CPop1 */ #ifdef TARGET_SPARC64 int opf = GET_FIELD_SP(insn, 5, 13);