From patchwork Tue Oct 17 06:12:32 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 734299 Delivered-To: patch@linaro.org Received: by 2002:adf:f0cd:0:b0:32d:baff:b0ca with SMTP id x13csp324525wro; Mon, 16 Oct 2023 23:22:00 -0700 (PDT) X-Google-Smtp-Source: AGHT+IEnkmI4fzBxA33ouLfCKNIaEr4PfpVyQ933CFYOxvxxx9m+46clKFcnEwVfFRe9+fdm/wi+ X-Received: by 2002:a05:620a:4c85:b0:767:2a66:b792 with SMTP id to5-20020a05620a4c8500b007672a66b792mr1196133qkn.42.1697523720613; Mon, 16 Oct 2023 23:22:00 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697523720; cv=none; d=google.com; s=arc-20160816; b=QqYsm4Sgj81AP785o4LhFxQxNCNBfanY/YNDSTg935keyXagheLYBGkZMTIZq9cYok Szs0Gg9oWYfbXl/nWKRL1XCMVm1KDYp61iyS2a8vzdBj6bdEgZQQyf1m9yY+G5t0Mo1k sDbjiLUO8GHeTku8mkJ+4vGZZuiXGBTKTP+UcofP9GlNm/K+0badTvTzxgQEO6L8Xxfy WzS13k60QoQrXCebrYUg2p35pZPRdkZgwwPYIU7OLlU9zP9xnOocdV79SMuj61Km6hlK vIMHQeiP/431Z0fGQ7JgeDSiq4RKJwMroSUdiv6Fa3nIAa1Qd4yOlaF8DWNyWIPwimMD yZvw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=WuIByJHH5v/TZr5fDP/carJPcPPWSe3W25nTOp2MILs=; fh=TYrED6TOMxGX0VC4GtjviASLbYyJe19+7/tKWjN44KQ=; b=lS71lHfr0e76aedGk2zX/DbCdNXm44bFZtO0MFPDhhB5/m3lz7ZvXJxXwZeV0FAuZQ lSJs2v75OFscm+JS/rLEoYU6PX7Yt0v/sUaIVb8YnQp7mFGAepzxVqeYsUOaFO7fGb+h 60Z3QFGfG5BoZvtuBwbq9QGkTK+0NM9vl2TJzfGJ4mtEs55od9lOc8YWmGctcs2on5sj WwejwCDqT2K/u1d+1rPMwvthdSRXJKqeZ6YvJse8m6lCpDqWlXfGCuyhiiYkEeYkv4dQ IfWHEOQlQ6eKBMhM3FGLOGhb//H1m9Jxqe7HOkIXJLblAg+aQelzHELfgh4/ynXLHKnH ZyDw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="qNd/p9Mp"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id qr7-20020a05620a390700b0076d9dc0bc9esi603951qkn.230.2023.10.16.23.22.00 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Mon, 16 Oct 2023 23:22:00 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="qNd/p9Mp"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qsdOG-0004Gm-Be; Tue, 17 Oct 2023 02:17:16 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qsdNw-0003o1-D4 for qemu-devel@nongnu.org; Tue, 17 Oct 2023 02:16:56 -0400 Received: from mail-ot1-x32b.google.com ([2607:f8b0:4864:20::32b]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1qsdNu-0004pz-6D for qemu-devel@nongnu.org; Tue, 17 Oct 2023 02:16:55 -0400 Received: by mail-ot1-x32b.google.com with SMTP id 46e09a7af769-6c4fc2ce697so3737620a34.0 for ; Mon, 16 Oct 2023 23:16:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1697523412; x=1698128212; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=WuIByJHH5v/TZr5fDP/carJPcPPWSe3W25nTOp2MILs=; b=qNd/p9Mp4QqEkXxuzoUvzhRu1qFTNOJJLSFsva/2zuyrU163o8NX4mLtPO3Pf+cRcw /qgIvKTLwMLPUl3h0g6vITFM/hiyiHVNHktCVPGYK01zty7s2XrZmYRijvfQ2Zt7d+Xn eJAo/o4AK9yUyvC4RBmIJwZt+Clmv7u4hQ1FZ+wfGeSebwo3bkfzNrnzMUlf1Ie7RFUh 8YW/8+OntOR5695Wo8cHsUhatg33aa4ovNLiIhVpk5p4d1UqE6YXuu6ZkRSIfIm/aEEm XEqMzC2hgQ6AwnRhhO7llOjtfF/1KWR1UT8C7cVpJApvlrk05EG04n6CNKaH4O7QHC1N fHDA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1697523412; x=1698128212; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=WuIByJHH5v/TZr5fDP/carJPcPPWSe3W25nTOp2MILs=; b=wIPXOMR7YzgEZeJGMbxFWe2+GZ6lyh7UkQwSKqK1lbgGffe1BoHuLSduNmjCK8OtIt b6tuuSdVKLrYByByOTNQ2CMu/NLew/GwGsQrRWXeNfsxaPetTVJOWKZHdKJc+pgmjwHj f/6Ju9dpLPMwfj6rh8RTMpOI7zbCK3VXQ1jmVvaAMwveCkU1J3aTvqX6ha/7d9FTl5gx a3iPuuZTfNV1KK32vzAVWmcorXC7mpoCjr3TkMde7yPmazD1LOAcCBlmDVmrnaNWOs1T cxM6/Qp6JBMd7ZBhGlV93/80E17G/Z8lhDFp9Y2E6p1kDqGxv5EBp9VMD7D0ZsJ358rD 4GBw== X-Gm-Message-State: AOJu0YwhB0RdNoG8LY/mfJMn4dIWUoPZ9p37rH3yPWUfDdDZvVMIIkAV BvVrjOdpNXSYtZjjSEJb6R+FVVItrsGjpk1X3d8= X-Received: by 2002:a05:6359:6d49:b0:14f:736b:7745 with SMTP id tf9-20020a0563596d4900b0014f736b7745mr1213531rwb.31.1697523412063; Mon, 16 Oct 2023 23:16:52 -0700 (PDT) Received: from stoup.. ([71.212.149.95]) by smtp.gmail.com with ESMTPSA id m10-20020a056a00080a00b00690ca4356f1sm579280pfk.198.2023.10.16.23.16.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 16 Oct 2023 23:16:51 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: mark.cave-ayland@ilande.co.uk Subject: [PATCH v2 78/90] target/sparc: Move gen_fop_FD insns to decodetree Date: Mon, 16 Oct 2023 23:12:32 -0700 Message-Id: <20231017061244.681584-79-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231017061244.681584-1-richard.henderson@linaro.org> References: <20231017061244.681584-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::32b; envelope-from=richard.henderson@linaro.org; helo=mail-ot1-x32b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Move FdTOs, FdTOi, FxTOs. Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 3 +++ target/sparc/translate.c | 51 +++++++++++++++++++++------------------ 2 files changed, 30 insertions(+), 24 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index a98b3b2bdd..a0af20f042 100644 --- a/target/sparc/insns.decode +++ b/target/sparc/insns.decode @@ -256,9 +256,12 @@ FDIVq 10 ..... 110100 ..... 0 0100 1111 ..... @r_r_r FsMULd 10 ..... 110100 ..... 0 0110 1001 ..... @r_r_r FdMULq 10 ..... 110100 ..... 0 0110 1110 ..... @r_r_r FdTOx 10 ..... 110100 00000 0 1000 0010 ..... @r_r2 +FxTOs 10 ..... 110100 00000 0 1000 0100 ..... @r_r2 FxTOd 10 ..... 110100 00000 0 1000 1000 ..... @r_r2 FiTOs 10 ..... 110100 00000 0 1100 0100 ..... @r_r2 +FdTOs 10 ..... 110100 00000 0 1100 0110 ..... @r_r2 FsTOi 10 ..... 110100 00000 0 1101 0001 ..... @r_r2 +FdTOi 10 ..... 110100 00000 0 1101 0010 ..... @r_r2 { [ diff --git a/target/sparc/translate.c b/target/sparc/translate.c index 28d63c9915..acb9e58319 100644 --- a/target/sparc/translate.c +++ b/target/sparc/translate.c @@ -55,6 +55,7 @@ #define gen_helper_restored ({ qemu_build_not_reached(); NULL; }) #define gen_helper_fdtox ({ qemu_build_not_reached(); NULL; }) #define gen_helper_fxtod ({ qemu_build_not_reached(); NULL; }) +#define gen_helper_fxtos ({ qemu_build_not_reached(); NULL; }) #define gen_helper_fnegd(D, S) qemu_build_not_reached() #define gen_helper_fabsd(D, S) qemu_build_not_reached() #define gen_helper_done(E) qemu_build_not_reached() @@ -1655,21 +1656,6 @@ static void gen_ne_fop_DF(DisasContext *dc, int rd, int rs, gen_store_fpr_D(dc, rd, dst); } -static void gen_fop_FD(DisasContext *dc, int rd, int rs, - void (*gen)(TCGv_i32, TCGv_ptr, TCGv_i64)) -{ - TCGv_i32 dst; - TCGv_i64 src; - - src = gen_load_fpr_D(dc, rs); - dst = gen_dest_fpr_F(dc); - - gen(dst, tcg_env, src); - gen_helper_check_ieee_exceptions(cpu_fsr, tcg_env); - - gen_store_fpr_F(dc, rd, dst); -} - static void gen_fop_FQ(DisasContext *dc, int rd, int rs, void (*gen)(TCGv_i32, TCGv_ptr)) { @@ -4802,6 +4788,29 @@ TRANS(FSQRTs, ALL, do_env_ff, a, gen_helper_fsqrts) TRANS(FiTOs, ALL, do_env_ff, a, gen_helper_fitos) TRANS(FsTOi, ALL, do_env_ff, a, gen_helper_fstoi) +static bool do_env_fd(DisasContext *dc, arg_r_r *a, + void (*func)(TCGv_i32, TCGv_env, TCGv_i64)) +{ + TCGv_i32 dst; + TCGv_i64 src; + + if (gen_trap_ifnofpu(dc)) { + return true; + } + + gen_op_clear_ieee_excp_and_FTT(); + dst = gen_dest_fpr_F(dc); + src = gen_load_fpr_D(dc, a->rs); + func(dst, tcg_env, src); + gen_helper_check_ieee_exceptions(cpu_fsr, tcg_env); + gen_store_fpr_F(dc, a->rd, dst); + return advance_pc(dc); +} + +TRANS(FdTOs, ALL, do_env_fd, a, gen_helper_fdtos) +TRANS(FdTOi, ALL, do_env_fd, a, gen_helper_fdtoi) +TRANS(FxTOs, 64, do_env_fd, a, gen_helper_fxtos) + static bool do_dd(DisasContext *dc, arg_r_r *a, void (*func)(TCGv_i64, TCGv_i64)) { @@ -5142,10 +5151,10 @@ static void disas_sparc_legacy(DisasContext *dc, unsigned int insn) case 0x4f: /* fdivq */ case 0x69: /* fsmuld */ case 0x6e: /* fdmulq */ - g_assert_not_reached(); /* in decodetree */ case 0xc6: /* fdtos */ - gen_fop_FD(dc, rd, rs2, gen_helper_fdtos); - break; + case 0xd2: /* fdtoi */ + case 0x84: /* V9 fxtos */ + g_assert_not_reached(); /* in decodetree */ case 0xc7: /* fqtos */ CHECK_FPU_FEATURE(dc, FLOAT128); gen_fop_FQ(dc, rd, rs2, gen_helper_fqtos); @@ -5172,9 +5181,6 @@ static void disas_sparc_legacy(DisasContext *dc, unsigned int insn) CHECK_FPU_FEATURE(dc, FLOAT128); gen_ne_fop_QD(dc, rd, rs2, gen_helper_fdtoq); break; - case 0xd2: /* fdtoi */ - gen_fop_FD(dc, rd, rs2, gen_helper_fdtoi); - break; case 0xd3: /* fqtoi */ CHECK_FPU_FEATURE(dc, FLOAT128); gen_fop_FQ(dc, rd, rs2, gen_helper_fqtoi); @@ -5199,9 +5205,6 @@ static void disas_sparc_legacy(DisasContext *dc, unsigned int insn) CHECK_FPU_FEATURE(dc, FLOAT128); gen_fop_DQ(dc, rd, rs2, gen_helper_fqtox); break; - case 0x84: /* V9 fxtos */ - gen_fop_FD(dc, rd, rs2, gen_helper_fxtos); - break; case 0x8c: /* V9 fxtoq */ CHECK_FPU_FEATURE(dc, FLOAT128); gen_ne_fop_QD(dc, rd, rs2, gen_helper_fxtoq);