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([71.212.149.95]) by smtp.gmail.com with ESMTPSA id x18-20020a17090300d200b001b891259eddsm685682plc.197.2023.10.16.23.41.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 16 Oct 2023 23:41:18 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: mark.cave-ayland@ilande.co.uk Subject: [PATCH 11/20] target/sparc: Always copy conditions into a new temporary Date: Mon, 16 Oct 2023 23:41:00 -0700 Message-Id: <20231017064109.681935-12-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231017064109.681935-1-richard.henderson@linaro.org> References: <20231017064109.681935-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::632; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x632.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, T_SPF_TEMPERROR=0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org This will allow the condition to live across changes to the global cc variables. Signed-off-by: Richard Henderson --- target/sparc/translate.c | 20 +++++++------------- 1 file changed, 7 insertions(+), 13 deletions(-) diff --git a/target/sparc/translate.c b/target/sparc/translate.c index 32d29f16b5..a75f75dfb9 100644 --- a/target/sparc/translate.c +++ b/target/sparc/translate.c @@ -977,7 +977,7 @@ static void gen_compare(DisasCompare *cmp, bool xcc, unsigned int cond, { TCGv t1, t2, zero; - cmp->c1 = NULL; + cmp->c1 = t1 = tcg_temp_new(); cmp->c2 = 0; switch (cond & 7) { @@ -989,16 +989,14 @@ static void gen_compare(DisasCompare *cmp, bool xcc, unsigned int cond, case 0x1: /* eq */ cmp->cond = TCG_COND_EQ; if (TARGET_LONG_BITS == 32 || xcc) { - cmp->c1 = cpu_cc_Z; + tcg_gen_mov_tl(t1, cpu_cc_Z); } else { - cmp->c1 = t1 = tcg_temp_new(); tcg_gen_ext32u_tl(t1, cpu_icc_Z); } break; case 0x2: /* le: Z | (N ^ V) */ cmp->cond = TCG_COND_LT; - cmp->c1 = t1 = tcg_temp_new(); zero = tcg_constant_tl(0); if (TARGET_LONG_BITS == 32 || xcc) { tcg_gen_negsetcond_tl(TCG_COND_EQ, t1, cpu_cc_Z, zero); @@ -1016,7 +1014,6 @@ static void gen_compare(DisasCompare *cmp, bool xcc, unsigned int cond, case 0x3: /* lt: N ^ V */ cmp->cond = TCG_COND_LT; - cmp->c1 = t1 = tcg_temp_new(); tcg_gen_xor_tl(t1, cpu_cc_N, cpu_cc_V); if (TARGET_LONG_BITS == 64 && !xcc) { tcg_gen_ext32s_tl(t1, t1); @@ -1025,7 +1022,6 @@ static void gen_compare(DisasCompare *cmp, bool xcc, unsigned int cond, case 0x4: /* leu: C | Z -> !(!C & !Z) */ cmp->cond = TCG_COND_EQ; - cmp->c1 = t1 = tcg_temp_new(); if (TARGET_LONG_BITS == 32 || xcc) { tcg_gen_subi_tl(t1, cpu_cc_C, 1); tcg_gen_and_tl(t1, t1, cpu_cc_Z); @@ -1041,9 +1037,8 @@ static void gen_compare(DisasCompare *cmp, bool xcc, unsigned int cond, case 0x5: /* ltu: C */ cmp->cond = TCG_COND_NE; if (TARGET_LONG_BITS == 32 || xcc) { - cmp->c1 = cpu_cc_C; + tcg_gen_mov_tl(t1, cpu_cc_C); } else { - cmp->c1 = t1 = tcg_temp_new(); tcg_gen_extract_tl(t1, cpu_icc_C, 32, 1); } break; @@ -1051,9 +1046,8 @@ static void gen_compare(DisasCompare *cmp, bool xcc, unsigned int cond, case 0x6: /* neg: N */ cmp->cond = TCG_COND_LT; if (TARGET_LONG_BITS == 32 || xcc) { - cmp->c1 = cpu_cc_N; + tcg_gen_mov_tl(t1, cpu_cc_N); } else { - cmp->c1 = t1 = tcg_temp_new(); tcg_gen_ext32s_tl(t1, cpu_cc_N); } break; @@ -1061,9 +1055,8 @@ static void gen_compare(DisasCompare *cmp, bool xcc, unsigned int cond, case 0x7: /* vs: V */ cmp->cond = TCG_COND_LT; if (TARGET_LONG_BITS == 32 || xcc) { - cmp->c1 = cpu_cc_V; + tcg_gen_mov_tl(t1, cpu_cc_V); } else { - cmp->c1 = t1 = tcg_temp_new(); tcg_gen_ext32s_tl(t1, cpu_cc_V); } break; @@ -1166,8 +1159,9 @@ static const TCGCond gen_tcg_cond_reg[8] = { static void gen_compare_reg(DisasCompare *cmp, int cond, TCGv r_src) { cmp->cond = tcg_invert_cond(gen_tcg_cond_reg[cond]); - cmp->c1 = r_src; + cmp->c1 = tcg_temp_new(); cmp->c2 = 0; + tcg_gen_mov_tl(cmp->c1, r_src); } static void gen_op_clear_ieee_excp_and_FTT(void)