From patchwork Thu Oct 19 13:09:22 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 735544 Delivered-To: patch@linaro.org Received: by 2002:adf:f0cd:0:b0:32d:baff:b0ca with SMTP id x13csp1507524wro; Thu, 19 Oct 2023 06:12:06 -0700 (PDT) X-Google-Smtp-Source: AGHT+IFWuTrkvcTMF4OmZHiO/asPZHyXNO7LOpjZ8rMl/AigWrlvO9uhdDxRZwIgK/6iNzLvOF5I X-Received: by 2002:a05:600c:35c4:b0:406:c6de:2bea with SMTP id r4-20020a05600c35c400b00406c6de2beamr1844491wmq.17.1697721126524; Thu, 19 Oct 2023 06:12:06 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697721126; cv=none; d=google.com; s=arc-20160816; b=0lhqihTggKGKOFkJPFDwlpaAd6Xb7Bq1JP905bWkjLCByD/EtlhHIj2hGdJp9dYzHY rSTNJeC5Zja/gI36zJvWMWkNp1CCluMex5ZV4cVdZMPpHMPwG9lqPIqqY1U0wTq0Y5pS gJDSet/OlL23CjsXpuhobG+Mm70xyIf5FGG+5SuzZYunwFLBjQTebyKBqom95fOj5mqI 75BwHGpjU4merkA2/6ZDnU558kfugFlboP8mYZbnlFA/l3MwRrJnlMwjQVGibDw+SPq0 I2DUHs+fd3Fb0B+56sbnH2W/S2Z2oZ/R5lzpTpFUnXNECe6zdxlFCW2CIO3y3gdf1bBc XOnA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=RG5zLlWN/LC4pJbPVJoFLnGQz4i0tpH2bVvTXsYTeOI=; fh=rYBZhAJdgCvxZRRcO2tKw9iXjHkAG8ZfVdmqU/2KeAE=; b=P7lOMMVZ0k3kr3Gw2scoCKlOl/88LjZpUwUjKaLeNvA5IcEQqKLmyUckaKP7ETEN/H XXuefUyWgbXBdeyZ1qPv9eIaiJdMyWTm9IiKTFUFierB/920gBWC47MuZWeGboP8a3KL F7eF7JSR19wREu41T4W6N0jbBUNQUPIDNmfbfqYGN/c2pYvQzGh7BuPJgYBr+k8ds/OM 6NqkyLWJRk7J26bdbovWY1Yuou9KQZMeE+edALqE/U7W03jOFKa4KSo4rBkMmaXlC1jx mgx12uKF+OkQA6JgfOo61cKyJdKRhH3pnl76QHxuEwPbv4+D2RoYcTlHxx0o2wQp5PDr i3yw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=RWD6Xe2o; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id n4-20020a05600c3b8400b004083e1d6de3si2328551wms.51.2023.10.19.06.12.06 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Thu, 19 Oct 2023 06:12:06 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=RWD6Xe2o; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qtSn7-0005h6-LS; Thu, 19 Oct 2023 09:10:21 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qtSn0-0005OE-30 for qemu-devel@nongnu.org; Thu, 19 Oct 2023 09:10:14 -0400 Received: from mail-wm1-x32c.google.com ([2a00:1450:4864:20::32c]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1qtSmx-0007z8-QH for qemu-devel@nongnu.org; Thu, 19 Oct 2023 09:10:13 -0400 Received: by mail-wm1-x32c.google.com with SMTP id 5b1f17b1804b1-406609df1a6so72834785e9.3 for ; Thu, 19 Oct 2023 06:10:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1697721009; x=1698325809; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=RG5zLlWN/LC4pJbPVJoFLnGQz4i0tpH2bVvTXsYTeOI=; b=RWD6Xe2o+7QqJPE/q0O/ioZ6oa6/FeioX42H3ci+ZkC0xlXqvGcWUdZPtG6DohKyMM 4YXeJ/ZyYJcXuxV6Y5ANEfh1Sw/qDjFkvcpMk67/FfQDC29D31VHzpnFrGCfowrKI7BM DdVxZEetBnixBT1MLTp7waEkZ218k9hZACsybrywvFrjReWYGhNVTjjirNJWU6DUzwQ3 iKjj1szTRt7THElIGZYDXPxe5vRSjNRY34IDpCFGQIasITr6uWGtlX5mAbcxhrNe7/Si IJKKSscCj/qxnuJ71sudOtkctqbuaozrYKo7eFD1BYlxu1kibz4mggJMFNgu+5ltpHSK Ch3A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1697721009; x=1698325809; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=RG5zLlWN/LC4pJbPVJoFLnGQz4i0tpH2bVvTXsYTeOI=; b=LW6m9ZdOV8a5A8kqw7Anu+SjIlNbVrH/Q5O+eqr0TeMNncvj5cN8eKdpZuVVHMBA7w 50tDYUIVjyc1IpnU+jqPJaaD0+ronBiFx873rBVLMB8k+ylD8xsA2dxLc90Ow654eEqS a5jnxOwaxFM7V1tnb0t08vQk18oB3UItKe+LnbwVgN5E5a5mfjYsjZwY4+hdM3QuHG0k Vw6M28XD2vnBUqSCLbThN3UFsIICSvrYcvIXvw14o81hx+Ra0ON73cdGBh+hyoT2FpXF QC6SpeL8YSN/UyMhqI/qUWNdPZTAeuLwuSRUKoOprjwMXpuBLRS2Ew9aos8uqwl9mzSW +7FQ== X-Gm-Message-State: AOJu0YzvVlc5M/qS3qjGvEMzouI3lpoMqytCkLxx5ZZYbpu6N/I4hv17 6VmdKfx7h0vIJxTPzs3ZA6mSW3mMuwsfuX2AsV2Ycw== X-Received: by 2002:a05:600c:a07:b0:408:3f64:6553 with SMTP id z7-20020a05600c0a0700b004083f646553mr1746777wmp.16.1697721008600; Thu, 19 Oct 2023 06:10:08 -0700 (PDT) Received: from m1x-phil.lan (176-131-216-177.abo.bbox.fr. [176.131.216.177]) by smtp.gmail.com with ESMTPSA id r16-20020a05600c459000b00405391f485fsm4456618wmo.41.2023.10.19.06.10.07 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 19 Oct 2023 06:10:08 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Peter Maydell , qemu-arm@nongnu.org, Thomas Huth , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v2 7/9] hw/intc/pxa2xx: Pass CPU reference using QOM link property Date: Thu, 19 Oct 2023 15:09:22 +0200 Message-ID: <20231019130925.18744-8-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231019130925.18744-1-philmd@linaro.org> References: <20231019130925.18744-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32c; envelope-from=philmd@linaro.org; helo=mail-wm1-x32c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org QOM objects shouldn't access each other internals fields except using the QOM API. Signed-off-by: Philippe Mathieu-Daudé --- hw/arm/pxa2xx_pic.c | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/hw/arm/pxa2xx_pic.c b/hw/arm/pxa2xx_pic.c index 2eb869a605..7e180635c2 100644 --- a/hw/arm/pxa2xx_pic.c +++ b/hw/arm/pxa2xx_pic.c @@ -15,6 +15,7 @@ #include "cpu.h" #include "hw/arm/pxa.h" #include "hw/sysbus.h" +#include "hw/qdev-properties.h" #include "migration/vmstate.h" #include "qom/object.h" #include "target/arm/cpregs.h" @@ -288,7 +289,8 @@ DeviceState *pxa2xx_pic_init(hwaddr base, ARMCPU *cpu) DeviceState *dev = qdev_new(TYPE_PXA2XX_PIC); PXA2xxPICState *s = PXA2XX_PIC(dev); - s->cpu = cpu; + object_property_set_link(OBJECT(dev), "arm-cpu", + OBJECT(cpu), &error_abort); sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); @@ -321,11 +323,18 @@ static const VMStateDescription vmstate_pxa2xx_pic_regs = { }, }; +static Property pxa2xx_pic_properties[] = { + DEFINE_PROP_LINK("arm-cpu", PXA2xxPICState, cpu, + TYPE_ARM_CPU, ARMCPU *), + DEFINE_PROP_END_OF_LIST(), +}; + static void pxa2xx_pic_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); ResettableClass *rc = RESETTABLE_CLASS(klass); + device_class_set_props(dc, pxa2xx_pic_properties); dc->desc = "PXA2xx PIC"; dc->vmsd = &vmstate_pxa2xx_pic_regs; rc->phases.hold = pxa2xx_pic_reset_hold;