@@ -1050,10 +1050,10 @@ static DisasCond do_log_cond(DisasContext *ctx, unsigned cf, bool d,
/* Similar, but for shift/extract/deposit conditions. */
-static DisasCond do_sed_cond(DisasContext *ctx, unsigned orig, TCGv_reg res)
+static DisasCond do_sed_cond(DisasContext *ctx, unsigned orig, bool d,
+ TCGv_reg res)
{
unsigned c, f;
- bool d = false;
/* Convert the compressed condition codes to standard.
0-2 are the same as logicals (nv,<,<=), while 3 is OD.
@@ -3224,7 +3224,8 @@ static bool trans_movb(DisasContext *ctx, arg_movb *a)
tcg_gen_mov_reg(dest, cpu_gr[a->r1]);
}
- cond = do_sed_cond(ctx, a->c, dest);
+ /* All MOVB conditions are 32-bit. */
+ cond = do_sed_cond(ctx, a->c, false, dest);
return do_cbranch(ctx, a->disp, a->n, &cond);
}
@@ -3238,7 +3239,8 @@ static bool trans_movbi(DisasContext *ctx, arg_movbi *a)
dest = dest_gpr(ctx, a->r);
tcg_gen_movi_reg(dest, a->i);
- cond = do_sed_cond(ctx, a->c, dest);
+ /* All MOVBI conditions are 32-bit. */
+ cond = do_sed_cond(ctx, a->c, false, dest);
return do_cbranch(ctx, a->disp, a->n, &cond);
}
@@ -3276,7 +3278,7 @@ static bool trans_shrpw_sar(DisasContext *ctx, arg_shrpw_sar *a)
/* Install the new nullification. */
cond_free(&ctx->null_cond);
if (a->c) {
- ctx->null_cond = do_sed_cond(ctx, a->c, dest);
+ ctx->null_cond = do_sed_cond(ctx, a->c, false, dest);
}
return nullify_end(ctx);
}
@@ -3312,7 +3314,7 @@ static bool trans_shrpw_imm(DisasContext *ctx, arg_shrpw_imm *a)
/* Install the new nullification. */
cond_free(&ctx->null_cond);
if (a->c) {
- ctx->null_cond = do_sed_cond(ctx, a->c, dest);
+ ctx->null_cond = do_sed_cond(ctx, a->c, false, dest);
}
return nullify_end(ctx);
}
@@ -3346,7 +3348,7 @@ static bool trans_extrw_sar(DisasContext *ctx, arg_extrw_sar *a)
/* Install the new nullification. */
cond_free(&ctx->null_cond);
if (a->c) {
- ctx->null_cond = do_sed_cond(ctx, a->c, dest);
+ ctx->null_cond = do_sed_cond(ctx, a->c, false, dest);
}
return nullify_end(ctx);
}
@@ -3373,7 +3375,7 @@ static bool trans_extrw_imm(DisasContext *ctx, arg_extrw_imm *a)
/* Install the new nullification. */
cond_free(&ctx->null_cond);
if (a->c) {
- ctx->null_cond = do_sed_cond(ctx, a->c, dest);
+ ctx->null_cond = do_sed_cond(ctx, a->c, false, dest);
}
return nullify_end(ctx);
}
@@ -3410,7 +3412,7 @@ static bool trans_depwi_imm(DisasContext *ctx, arg_depwi_imm *a)
/* Install the new nullification. */
cond_free(&ctx->null_cond);
if (a->c) {
- ctx->null_cond = do_sed_cond(ctx, a->c, dest);
+ ctx->null_cond = do_sed_cond(ctx, a->c, false, dest);
}
return nullify_end(ctx);
}
@@ -3440,7 +3442,7 @@ static bool trans_depw_imm(DisasContext *ctx, arg_depw_imm *a)
/* Install the new nullification. */
cond_free(&ctx->null_cond);
if (a->c) {
- ctx->null_cond = do_sed_cond(ctx, a->c, dest);
+ ctx->null_cond = do_sed_cond(ctx, a->c, false, dest);
}
return nullify_end(ctx);
}
@@ -3477,7 +3479,7 @@ static bool do_depw_sar(DisasContext *ctx, unsigned rt, unsigned c,
/* Install the new nullification. */
cond_free(&ctx->null_cond);
if (c) {
- ctx->null_cond = do_sed_cond(ctx, c, dest);
+ ctx->null_cond = do_sed_cond(ctx, c, false, dest);
}
return nullify_end(ctx);
}
Hoist the resolution of d up one level above do_sed_cond. The MOVB comparison and the existing shift/extract/deposit are all 32-bit. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- target/hppa/translate.c | 24 +++++++++++++----------- 1 file changed, 13 insertions(+), 11 deletions(-)