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([71.212.149.95]) by smtp.gmail.com with ESMTPSA id 13-20020a17090a004d00b0027782f611d1sm6744883pjb.36.2023.11.06.19.08.03 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Nov 2023 19:08:03 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 74/85] target/hppa: Implement pa2.0 data prefetch instructions Date: Mon, 6 Nov 2023 19:03:56 -0800 Message-Id: <20231107030407.8979-75-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231107030407.8979-1-richard.henderson@linaro.org> References: <20231107030407.8979-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::42e; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org These are aliased onto the normal integer loads to %g0. Since we don't emulate caches, prefetch is a nop. Signed-off-by: Richard Henderson --- target/hppa/translate.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/target/hppa/translate.c b/target/hppa/translate.c index ba15cf6ab8..e7f379d648 100644 --- a/target/hppa/translate.c +++ b/target/hppa/translate.c @@ -2976,7 +2976,15 @@ static bool trans_permh(DisasContext *ctx, arg_permh *a) static bool trans_ld(DisasContext *ctx, arg_ldst *a) { - if (!ctx->is_pa20 && a->size > MO_32) { + if (ctx->is_pa20) { + /* + * With pa20, LDB, LDH, LDW, LDD to %g0 are prefetches. + * Any base modification still occurs. + */ + if (a->t == 0) { + return trans_nop_addrx(ctx, a); + } + } else if (a->size > MO_32) { return gen_illegal(ctx); } return do_load(ctx, a->t, a->b, a->x, a->scale ? a->size : 0,