| Message ID | 20231218113305.2511480-9-peter.maydell@linaro.org |
|---|---|
| State | Superseded |
| Headers | show |
| Series | target/arm: Implement emulation of nested virtualization | expand |
On 12/18/23 22:32, Peter Maydell wrote: > The TBFLAG_A64 TB flag bits go in flags2, which for AArch64 guests > we know is 64 bits. However at the moment we use FIELD_EX32() and > FIELD_DP32() to read and write these bits, which only works for > bits 0 to 31. Since we're about to add a flag that uses bit 32, > switch to FIELD_EX64() and FIELD_DP64() so that this will work. > > Signed-off-by: Peter Maydell <peter.maydell@linaro.org> > --- > target/arm/cpu.h | 8 +++++--- > 1 file changed, 5 insertions(+), 3 deletions(-) Oops, I hadn't intended this to be 32-bit from the start. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> r~ > > diff --git a/target/arm/cpu.h b/target/arm/cpu.h > index 167b3759ac9..91157db85ae 100644 > --- a/target/arm/cpu.h > +++ b/target/arm/cpu.h > @@ -3240,12 +3240,14 @@ FIELD(TBFLAG_A64, NAA, 30, 1) > FIELD(TBFLAG_A64, ATA0, 31, 1) > > /* > - * Helpers for using the above. > + * Helpers for using the above. Note that only the A64 accessors use > + * FIELD_DP64() and FIELD_EX64(), because in the other cases the flags > + * word either is or might be 32 bits only. > */ > #define DP_TBFLAG_ANY(DST, WHICH, VAL) \ > (DST.flags = FIELD_DP32(DST.flags, TBFLAG_ANY, WHICH, VAL)) > #define DP_TBFLAG_A64(DST, WHICH, VAL) \ > - (DST.flags2 = FIELD_DP32(DST.flags2, TBFLAG_A64, WHICH, VAL)) > + (DST.flags2 = FIELD_DP64(DST.flags2, TBFLAG_A64, WHICH, VAL)) > #define DP_TBFLAG_A32(DST, WHICH, VAL) \ > (DST.flags2 = FIELD_DP32(DST.flags2, TBFLAG_A32, WHICH, VAL)) > #define DP_TBFLAG_M32(DST, WHICH, VAL) \ > @@ -3254,7 +3256,7 @@ FIELD(TBFLAG_A64, ATA0, 31, 1) > (DST.flags2 = FIELD_DP32(DST.flags2, TBFLAG_AM32, WHICH, VAL)) > > #define EX_TBFLAG_ANY(IN, WHICH) FIELD_EX32(IN.flags, TBFLAG_ANY, WHICH) > -#define EX_TBFLAG_A64(IN, WHICH) FIELD_EX32(IN.flags2, TBFLAG_A64, WHICH) > +#define EX_TBFLAG_A64(IN, WHICH) FIELD_EX64(IN.flags2, TBFLAG_A64, WHICH) > #define EX_TBFLAG_A32(IN, WHICH) FIELD_EX32(IN.flags2, TBFLAG_A32, WHICH) > #define EX_TBFLAG_M32(IN, WHICH) FIELD_EX32(IN.flags2, TBFLAG_M32, WHICH) > #define EX_TBFLAG_AM32(IN, WHICH) FIELD_EX32(IN.flags2, TBFLAG_AM32, WHICH)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 167b3759ac9..91157db85ae 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -3240,12 +3240,14 @@ FIELD(TBFLAG_A64, NAA, 30, 1) FIELD(TBFLAG_A64, ATA0, 31, 1) /* - * Helpers for using the above. + * Helpers for using the above. Note that only the A64 accessors use + * FIELD_DP64() and FIELD_EX64(), because in the other cases the flags + * word either is or might be 32 bits only. */ #define DP_TBFLAG_ANY(DST, WHICH, VAL) \ (DST.flags = FIELD_DP32(DST.flags, TBFLAG_ANY, WHICH, VAL)) #define DP_TBFLAG_A64(DST, WHICH, VAL) \ - (DST.flags2 = FIELD_DP32(DST.flags2, TBFLAG_A64, WHICH, VAL)) + (DST.flags2 = FIELD_DP64(DST.flags2, TBFLAG_A64, WHICH, VAL)) #define DP_TBFLAG_A32(DST, WHICH, VAL) \ (DST.flags2 = FIELD_DP32(DST.flags2, TBFLAG_A32, WHICH, VAL)) #define DP_TBFLAG_M32(DST, WHICH, VAL) \ @@ -3254,7 +3256,7 @@ FIELD(TBFLAG_A64, ATA0, 31, 1) (DST.flags2 = FIELD_DP32(DST.flags2, TBFLAG_AM32, WHICH, VAL)) #define EX_TBFLAG_ANY(IN, WHICH) FIELD_EX32(IN.flags, TBFLAG_ANY, WHICH) -#define EX_TBFLAG_A64(IN, WHICH) FIELD_EX32(IN.flags2, TBFLAG_A64, WHICH) +#define EX_TBFLAG_A64(IN, WHICH) FIELD_EX64(IN.flags2, TBFLAG_A64, WHICH) #define EX_TBFLAG_A32(IN, WHICH) FIELD_EX32(IN.flags2, TBFLAG_A32, WHICH) #define EX_TBFLAG_M32(IN, WHICH) FIELD_EX32(IN.flags2, TBFLAG_M32, WHICH) #define EX_TBFLAG_AM32(IN, WHICH) FIELD_EX32(IN.flags2, TBFLAG_AM32, WHICH)
The TBFLAG_A64 TB flag bits go in flags2, which for AArch64 guests we know is 64 bits. However at the moment we use FIELD_EX32() and FIELD_DP32() to read and write these bits, which only works for bits 0 to 31. Since we're about to add a flag that uses bit 32, switch to FIELD_EX64() and FIELD_DP64() so that this will work. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> --- target/arm/cpu.h | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-)