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([172.58.139.164]) by smtp.gmail.com with ESMTPSA id l16-20020ad44d10000000b0067f7b6318b9sm347257qvl.10.2023.12.20.19.23.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 Dec 2023 19:23:14 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v2 46/71] hw/pci-host: Constify VMState Date: Thu, 21 Dec 2023 14:16:27 +1100 Message-Id: <20231221031652.119827-47-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231221031652.119827-1-richard.henderson@linaro.org> References: <20231221031652.119827-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::f2b; envelope-from=richard.henderson@linaro.org; helo=mail-qv1-xf2b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Tested-by: Philippe Mathieu-Daudé Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- hw/pci-host/astro.c | 4 ++-- hw/pci-host/bonito.c | 2 +- hw/pci-host/designware.c | 10 +++++----- hw/pci-host/dino.c | 2 +- hw/pci-host/gpex.c | 2 +- hw/pci-host/gt64120.c | 2 +- hw/pci-host/i440fx.c | 2 +- hw/pci-host/ppce500.c | 6 +++--- hw/pci-host/q35.c | 2 +- hw/pci-host/raven.c | 2 +- hw/pci-host/versatile.c | 2 +- 11 files changed, 18 insertions(+), 18 deletions(-) diff --git a/hw/pci-host/astro.c b/hw/pci-host/astro.c index 7d68ccee7e..f4de70475c 100644 --- a/hw/pci-host/astro.c +++ b/hw/pci-host/astro.c @@ -459,7 +459,7 @@ static const VMStateDescription vmstate_elroy = { .name = "Elroy", .version_id = 1, .minimum_version_id = 1, - .fields = (VMStateField[]) { + .fields = (const VMStateField[]) { VMSTATE_UINT64(hpa, ElroyState), VMSTATE_UINT32(pci_bus_num, ElroyState), VMSTATE_UINT64(config_address, ElroyState), @@ -691,7 +691,7 @@ static const VMStateDescription vmstate_astro = { .name = "Astro", .version_id = 1, .minimum_version_id = 1, - .fields = (VMStateField[]) { + .fields = (const VMStateField[]) { VMSTATE_UINT64(ioc_ctrl, AstroState), VMSTATE_UINT64(ioc_status_ctrl, AstroState), VMSTATE_UINT64_ARRAY(ioc_ranges, AstroState, (0x03d8 - 0x300) / 8), diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c index bab661f3ce..1f0c435348 100644 --- a/hw/pci-host/bonito.c +++ b/hw/pci-host/bonito.c @@ -619,7 +619,7 @@ static const VMStateDescription vmstate_bonito = { .name = "Bonito", .version_id = 1, .minimum_version_id = 1, - .fields = (VMStateField[]) { + .fields = (const VMStateField[]) { VMSTATE_PCI_DEVICE(dev, PCIBonitoState), VMSTATE_END_OF_LIST() } diff --git a/hw/pci-host/designware.c b/hw/pci-host/designware.c index f477f97847..dd9e389c07 100644 --- a/hw/pci-host/designware.c +++ b/hw/pci-host/designware.c @@ -529,7 +529,7 @@ static const VMStateDescription vmstate_designware_pcie_msi_bank = { .name = "designware-pcie-msi-bank", .version_id = 1, .minimum_version_id = 1, - .fields = (VMStateField[]) { + .fields = (const VMStateField[]) { VMSTATE_UINT32(enable, DesignwarePCIEMSIBank), VMSTATE_UINT32(mask, DesignwarePCIEMSIBank), VMSTATE_UINT32(status, DesignwarePCIEMSIBank), @@ -541,7 +541,7 @@ static const VMStateDescription vmstate_designware_pcie_msi = { .name = "designware-pcie-msi", .version_id = 1, .minimum_version_id = 1, - .fields = (VMStateField[]) { + .fields = (const VMStateField[]) { VMSTATE_UINT64(base, DesignwarePCIEMSI), VMSTATE_STRUCT_ARRAY(intr, DesignwarePCIEMSI, @@ -557,7 +557,7 @@ static const VMStateDescription vmstate_designware_pcie_viewport = { .name = "designware-pcie-viewport", .version_id = 1, .minimum_version_id = 1, - .fields = (VMStateField[]) { + .fields = (const VMStateField[]) { VMSTATE_UINT64(base, DesignwarePCIEViewport), VMSTATE_UINT64(target, DesignwarePCIEViewport), VMSTATE_UINT32(limit, DesignwarePCIEViewport), @@ -570,7 +570,7 @@ static const VMStateDescription vmstate_designware_pcie_root = { .name = "designware-pcie-root", .version_id = 1, .minimum_version_id = 1, - .fields = (VMStateField[]) { + .fields = (const VMStateField[]) { VMSTATE_PCI_DEVICE(parent_obj, PCIBridge), VMSTATE_UINT32(atu_viewport, DesignwarePCIERoot), VMSTATE_STRUCT_2DARRAY(viewports, @@ -718,7 +718,7 @@ static const VMStateDescription vmstate_designware_pcie_host = { .name = "designware-pcie-host", .version_id = 1, .minimum_version_id = 1, - .fields = (VMStateField[]) { + .fields = (const VMStateField[]) { VMSTATE_STRUCT(root, DesignwarePCIEHost, 1, diff --git a/hw/pci-host/dino.c b/hw/pci-host/dino.c index 5b0947a16c..d992c4bb69 100644 --- a/hw/pci-host/dino.c +++ b/hw/pci-host/dino.c @@ -287,7 +287,7 @@ static const VMStateDescription vmstate_dino = { .name = "Dino", .version_id = 2, .minimum_version_id = 1, - .fields = (VMStateField[]) { + .fields = (const VMStateField[]) { VMSTATE_UINT32(iar0, DinoState), VMSTATE_UINT32(iar1, DinoState), VMSTATE_UINT32(imr, DinoState), diff --git a/hw/pci-host/gpex.c b/hw/pci-host/gpex.c index a6752fac5e..e117e47fa7 100644 --- a/hw/pci-host/gpex.c +++ b/hw/pci-host/gpex.c @@ -195,7 +195,7 @@ static const VMStateDescription vmstate_gpex_root = { .name = "gpex_root", .version_id = 1, .minimum_version_id = 1, - .fields = (VMStateField[]) { + .fields = (const VMStateField[]) { VMSTATE_PCI_DEVICE(parent_obj, GPEXRootState), VMSTATE_END_OF_LIST() } diff --git a/hw/pci-host/gt64120.c b/hw/pci-host/gt64120.c index 143bf053d7..e02efc9e2e 100644 --- a/hw/pci-host/gt64120.c +++ b/hw/pci-host/gt64120.c @@ -431,7 +431,7 @@ static const VMStateDescription vmstate_gt64120 = { .version_id = 1, .minimum_version_id = 1, .post_load = gt64120_post_load, - .fields = (VMStateField[]) { + .fields = (const VMStateField[]) { VMSTATE_UINT32_ARRAY(regs, GT64120State, GT_REGS), VMSTATE_END_OF_LIST() } diff --git a/hw/pci-host/i440fx.c b/hw/pci-host/i440fx.c index 653cc3f149..4f0a0438d7 100644 --- a/hw/pci-host/i440fx.c +++ b/hw/pci-host/i440fx.c @@ -125,7 +125,7 @@ static const VMStateDescription vmstate_i440fx = { .version_id = 3, .minimum_version_id = 3, .post_load = i440fx_post_load, - .fields = (VMStateField[]) { + .fields = (const VMStateField[]) { VMSTATE_PCI_DEVICE(parent_obj, PCII440FXState), /* Used to be smm_enabled, which was basically always zero because * SeaBIOS hardly uses SMM. SMRAM is now handled by CPU code. diff --git a/hw/pci-host/ppce500.c b/hw/pci-host/ppce500.c index 453a4e6ed3..fa0d67b342 100644 --- a/hw/pci-host/ppce500.c +++ b/hw/pci-host/ppce500.c @@ -379,7 +379,7 @@ static const VMStateDescription vmstate_pci_outbound = { .name = "pci_outbound", .version_id = 0, .minimum_version_id = 0, - .fields = (VMStateField[]) { + .fields = (const VMStateField[]) { VMSTATE_UINT32(potar, struct pci_outbound), VMSTATE_UINT32(potear, struct pci_outbound), VMSTATE_UINT32(powbar, struct pci_outbound), @@ -392,7 +392,7 @@ static const VMStateDescription vmstate_pci_inbound = { .name = "pci_inbound", .version_id = 0, .minimum_version_id = 0, - .fields = (VMStateField[]) { + .fields = (const VMStateField[]) { VMSTATE_UINT32(pitar, struct pci_inbound), VMSTATE_UINT32(piwbar, struct pci_inbound), VMSTATE_UINT32(piwbear, struct pci_inbound), @@ -405,7 +405,7 @@ static const VMStateDescription vmstate_ppce500_pci = { .name = "ppce500_pci", .version_id = 1, .minimum_version_id = 1, - .fields = (VMStateField[]) { + .fields = (const VMStateField[]) { VMSTATE_STRUCT_ARRAY(pob, PPCE500PCIState, PPCE500_PCI_NR_POBS, 1, vmstate_pci_outbound, struct pci_outbound), VMSTATE_STRUCT_ARRAY(pib, PPCE500PCIState, PPCE500_PCI_NR_PIBS, 1, diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c index 08534bc7cc..0d7d4e3f08 100644 --- a/hw/pci-host/q35.c +++ b/hw/pci-host/q35.c @@ -520,7 +520,7 @@ static const VMStateDescription vmstate_mch = { .version_id = 1, .minimum_version_id = 1, .post_load = mch_post_load, - .fields = (VMStateField[]) { + .fields = (const VMStateField[]) { VMSTATE_PCI_DEVICE(parent_obj, MCHPCIState), /* Used to be smm_enabled, which was basically always zero because * SeaBIOS hardly uses SMM. SMRAM is now handled by CPU code. diff --git a/hw/pci-host/raven.c b/hw/pci-host/raven.c index 86c3a49087..f71d4872c8 100644 --- a/hw/pci-host/raven.c +++ b/hw/pci-host/raven.c @@ -383,7 +383,7 @@ static const VMStateDescription vmstate_raven = { .name = "raven", .version_id = 0, .minimum_version_id = 0, - .fields = (VMStateField[]) { + .fields = (const VMStateField[]) { VMSTATE_PCI_DEVICE(dev, RavenPCIState), VMSTATE_END_OF_LIST() }, diff --git a/hw/pci-host/versatile.c b/hw/pci-host/versatile.c index 60d4e7cd92..0e65deb3f9 100644 --- a/hw/pci-host/versatile.c +++ b/hw/pci-host/versatile.c @@ -147,7 +147,7 @@ static const VMStateDescription pci_vpb_vmstate = { .version_id = 1, .minimum_version_id = 1, .post_load = pci_vpb_post_load, - .fields = (VMStateField[]) { + .fields = (const VMStateField[]) { VMSTATE_UINT32_ARRAY(imap, PCIVPBState, 3), VMSTATE_UINT32_ARRAY(smap, PCIVPBState, 3), VMSTATE_UINT32(selfid, PCIVPBState),