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[176.184.26.1]) by smtp.gmail.com with ESMTPSA id f11-20020a5d50cb000000b00336ebf27d59sm1604796wrt.78.2024.01.05.07.44.39 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 05 Jan 2024 07:44:41 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, qemu-arm@nongnu.org, qemu-riscv@nongnu.org, Gavin Shan , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Richard Henderson , Aurelien Jarno , Jiaxun Yang , Aleksandar Rikalo Subject: [PULL 15/71] target/mips: Use generic cpu_list() Date: Fri, 5 Jan 2024 16:42:08 +0100 Message-ID: <20240105154307.21385-16-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240105154307.21385-1-philmd@linaro.org> References: <20240105154307.21385-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42b; envelope-from=philmd@linaro.org; helo=mail-wr1-x42b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Gavin Shan Before it's applied: [gshan@gshan q]$ ./build/qemu-system-mips64 -cpu ? MIPS '4Kc' MIPS '4Km' MIPS '4KEcR1' MIPS 'XBurstR1' MIPS '4KEmR1' MIPS '4KEc' MIPS '4KEm' MIPS '24Kc' MIPS '24KEc' MIPS '24Kf' MIPS '34Kf' MIPS '74Kf' MIPS 'XBurstR2' MIPS 'M14K' MIPS 'M14Kc' MIPS 'P5600' MIPS 'mips32r6-generic' MIPS 'I7200' MIPS 'R4000' MIPS 'VR5432' MIPS '5Kc' MIPS '5Kf' MIPS '20Kc' MIPS 'MIPS64R2-generic' MIPS '5KEc' MIPS '5KEf' MIPS 'I6400' MIPS 'I6500' MIPS 'Loongson-2E' MIPS 'Loongson-2F' MIPS 'Loongson-3A1000' MIPS 'Loongson-3A4000' MIPS 'mips64dspr2' MIPS 'Octeon68XX' After it's applied: [gshan@gshan q]$ ./build/qemu-system-mips64 -cpu ? Available CPUs: 20Kc 24Kc 24KEc 24Kf 34Kf 4Kc 4KEc 4KEcR1 4KEm 4KEmR1 4Km 5Kc 5KEc 5KEf 5Kf 74Kf I6400 I6500 I7200 Loongson-2E Loongson-2F Loongson-3A1000 Loongson-3A4000 M14K M14Kc mips32r6-generic mips64dspr2 MIPS64R2-generic Octeon68XX P5600 R4000 VR5432 XBurstR1 XBurstR2 Signed-off-by: Gavin Shan Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-ID: <20231114235628.534334-16-gshan@redhat.com> Signed-off-by: Philippe Mathieu-Daudé --- target/mips/cpu.h | 4 ---- target/mips/cpu-defs.c.inc | 9 --------- 2 files changed, 13 deletions(-) diff --git a/target/mips/cpu.h b/target/mips/cpu.h index 52f13f0363..1163a71f3c 100644 --- a/target/mips/cpu.h +++ b/target/mips/cpu.h @@ -1235,10 +1235,6 @@ struct MIPSCPUClass { bool no_data_aborts; }; -void mips_cpu_list(void); - -#define cpu_list mips_cpu_list - void cpu_wrdsp(uint32_t rs, uint32_t mask_num, CPUMIPSState *env); uint32_t cpu_rddsp(uint32_t mask_num, CPUMIPSState *env); diff --git a/target/mips/cpu-defs.c.inc b/target/mips/cpu-defs.c.inc index c0c389c59a..fbf787d8ce 100644 --- a/target/mips/cpu-defs.c.inc +++ b/target/mips/cpu-defs.c.inc @@ -1018,15 +1018,6 @@ const mips_def_t mips_defs[] = }; const int mips_defs_number = ARRAY_SIZE(mips_defs); -void mips_cpu_list(void) -{ - int i; - - for (i = 0; i < ARRAY_SIZE(mips_defs); i++) { - qemu_printf("MIPS '%s'\n", mips_defs[i].name); - } -} - static void fpu_init (CPUMIPSState *env, const mips_def_t *def) { int i;