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[176.184.26.1]) by smtp.gmail.com with ESMTPSA id g11-20020a05600c310b00b0040d94b65342sm1915385wmo.48.2024.01.05.07.45.04 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 05 Jan 2024 07:45:05 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, qemu-arm@nongnu.org, qemu-riscv@nongnu.org, Gavin Shan , Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= , Yoshinori Sato Subject: [PULL 19/71] target/sh4: Use generic cpu_list() Date: Fri, 5 Jan 2024 16:42:12 +0100 Message-ID: <20240105154307.21385-20-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240105154307.21385-1-philmd@linaro.org> References: <20240105154307.21385-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::331; envelope-from=philmd@linaro.org; helo=mail-wm1-x331.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Gavin Shan Before it's applied: [gshan@gshan q]$ ./build/qemu-system-sh4 -cpu ? sh7750r sh7751r sh7785 After it's applied: [gshan@gshan q]$ ./build/qemu-system-sh4 -cpu ? Available CPUs: sh7750r sh7751r sh7785 Signed-off-by: Gavin Shan Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Message-ID: <20231114235628.534334-20-gshan@redhat.com> Signed-off-by: Philippe Mathieu-Daudé --- target/sh4/cpu.h | 3 --- target/sh4/cpu.c | 17 ----------------- 2 files changed, 20 deletions(-) diff --git a/target/sh4/cpu.h b/target/sh4/cpu.h index 031dc0b457..0e6fa65bae 100644 --- a/target/sh4/cpu.h +++ b/target/sh4/cpu.h @@ -238,7 +238,6 @@ G_NORETURN void superh_cpu_do_unaligned_access(CPUState *cpu, vaddr addr, uintptr_t retaddr); void sh4_translate_init(void); -void sh4_cpu_list(void); #if !defined(CONFIG_USER_ONLY) hwaddr superh_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); @@ -272,8 +271,6 @@ void cpu_load_tlb(CPUSH4State * env); #define CPU_RESOLVING_TYPE TYPE_SUPERH_CPU -#define cpu_list sh4_cpu_list - /* MMU modes definitions */ #define MMU_USER_IDX 1 static inline int cpu_mmu_index (CPUSH4State *env, bool ifetch) diff --git a/target/sh4/cpu.c b/target/sh4/cpu.c index a8ec98b134..806a0ef875 100644 --- a/target/sh4/cpu.c +++ b/target/sh4/cpu.c @@ -122,23 +122,6 @@ static void superh_cpu_disas_set_info(CPUState *cpu, disassemble_info *info) info->print_insn = print_insn_sh; } -static void superh_cpu_list_entry(gpointer data, gpointer user_data) -{ - const char *typename = object_class_get_name(OBJECT_CLASS(data)); - int len = strlen(typename) - strlen(SUPERH_CPU_TYPE_SUFFIX); - - qemu_printf("%.*s\n", len, typename); -} - -void sh4_cpu_list(void) -{ - GSList *list; - - list = object_class_get_list_sorted(TYPE_SUPERH_CPU, false); - g_slist_foreach(list, superh_cpu_list_entry, NULL); - g_slist_free(list); -} - static ObjectClass *superh_cpu_class_by_name(const char *cpu_model) { ObjectClass *oc;