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[176.184.43.236]) by smtp.gmail.com with ESMTPSA id c3-20020a05600c0a4300b0040e47dc2e8fsm3234850wmq.6.2024.01.10.11.55.08 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 10 Jan 2024 11:55:10 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Marcin Juszkiewicz , qemu-arm@nongnu.org, Kevin Wolf , Igor Mitsyanko , =?utf-8?q?Alex_Benn=C3=A9e?= , Radoslaw Biernacki , "Edgar E. Iglesias" , Leif Lindholm , Rob Herring , Markus Armbruster , Alistair Francis , Peter Maydell , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= Subject: [PATCH v3 14/14] hw/arm: Prefer cpu_isar_feature(aa64_mte) over property_find(tag-memory) Date: Wed, 10 Jan 2024 20:53:28 +0100 Message-ID: <20240110195329.3995-15-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240110195329.3995-1-philmd@linaro.org> References: <20240110195329.3995-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::333; envelope-from=philmd@linaro.org; helo=mail-wm1-x333.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org The "tag-memory" property is added to ARMCPU when the A64_MTE bit is set in the feature ID register. Rather than checking whether the QOM property is present, directly check the feature bit. Since when ARM_FEATURE_AARCH64 is disabled the isar_aa64_mte register is invalid, also check for it (see the 'aarch64' variable set in the previous commit). Signed-off-by: Philippe Mathieu-Daudé --- hw/arm/virt.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index a43e87874c..7fd7173b5b 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -2188,7 +2188,7 @@ static void machvirt_init(MachineState *machine) * The property exists only if MemTag is supported. * If it is, we must allocate the ram to back that up. */ - if (!object_property_find(cpuobj, "tag-memory")) { + if (!aarch64 || !cpu_isar_feature(aa64_mte, ARM_CPU(cs))) { error_report("MTE requested, but not supported " "by the guest CPU"); exit(1);