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[176.184.8.67]) by smtp.gmail.com with ESMTPSA id e9-20020a056402104900b0055c15c5919csm4080051edu.86.2024.01.24.02.17.30 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 24 Jan 2024 02:17:31 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: Anton Johansson , qemu-devel@nongnu.org Cc: Paolo Bonzini , Richard Henderson , Pavel Dovgalyuk , Claudio Fontana , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH 8/9] accel/tcg: Introduce TCGCPUOps::cpu_exec_halt() handler Date: Wed, 24 Jan 2024 11:16:38 +0100 Message-ID: <20240124101639.30056-9-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240124101639.30056-1-philmd@linaro.org> References: <20240124101639.30056-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::52a; envelope-from=philmd@linaro.org; helo=mail-ed1-x52a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org In order to make accel/tcg/ target agnostic, introduce the cpu_exec_halt() handler. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Anton Johansson Reviewed-by: Richard Henderson --- include/hw/core/tcg-cpu-ops.h | 2 ++ accel/tcg/cpu-exec.c | 3 +++ 2 files changed, 5 insertions(+) diff --git a/include/hw/core/tcg-cpu-ops.h b/include/hw/core/tcg-cpu-ops.h index 2fae3ac70f..3307338c80 100644 --- a/include/hw/core/tcg-cpu-ops.h +++ b/include/hw/core/tcg-cpu-ops.h @@ -114,6 +114,8 @@ struct TCGCPUOps { void (*record_sigbus)(CPUState *cpu, vaddr addr, MMUAccessType access_type, uintptr_t ra); #else + /** @cpu_exec_halt: Callback for handling halt in cpu_exec */ + void (*cpu_exec_halt)(CPUState *cpu); /** @cpu_exec_interrupt: Callback for processing interrupts in cpu_exec */ bool (*cpu_exec_interrupt)(CPUState *cpu, int interrupt_request); /** diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index 5a978a9e72..390a9644da 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -681,6 +681,9 @@ static inline bool cpu_handle_halt(CPUClass *cc, CPUState *cpu) bql_unlock(); } #endif /* TARGET_I386 */ + if (cc->tcg_ops->cpu_exec_halt) { + cc->tcg_ops->cpu_exec_halt(cpu); + } if (!cpu_has_work(cpu)) { return true; }