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[173.197.98.125]) by smtp.gmail.com with ESMTPSA id q13-20020a170902dacd00b001dcfc68e7desm137269plx.75.2024.03.13.15.51.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 Mar 2024 15:51:49 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Helge Deller , Sven Schnelle Subject: [PATCH v2 2/3] target/hppa: Fix assemble_11a insns for wide mode Date: Wed, 13 Mar 2024 12:51:39 -1000 Message-Id: <20240313225140.812202-3-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240313225140.812202-1-richard.henderson@linaro.org> References: <20240313225140.812202-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::42e; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Tested-by: Helge Deller Reviewed-by: Helge Deller Reported-by: Sven Schnelle Signed-off-by: Richard Henderson --- target/hppa/insns.decode | 7 ++++--- target/hppa/translate.c | 23 +++++++++++++++++------ 2 files changed, 21 insertions(+), 9 deletions(-) diff --git a/target/hppa/insns.decode b/target/hppa/insns.decode index 0d9f8159ec..9c6f92444c 100644 --- a/target/hppa/insns.decode +++ b/target/hppa/insns.decode @@ -24,7 +24,7 @@ %assemble_sr3 13:1 14:2 %assemble_sr3x 13:1 14:2 !function=expand_sr3x -%assemble_11a 0:s1 4:10 !function=expand_shl3 +%assemble_11a 4:12 0:1 !function=expand_11a %assemble_12 0:s1 2:1 3:10 !function=expand_shl2 %assemble_12a 0:s1 3:11 !function=expand_shl2 %assemble_16 0:16 !function=expand_16 @@ -305,8 +305,9 @@ fstd 001011 ..... ..... .. . 1 -- 100 0 . ..... @fldstdi # Offset Mem #### -@ldstim11 ...... b:5 t:5 sp:2 .............. \ - &ldst disp=%assemble_11a m=%ma2_to_m x=0 scale=0 size=3 +@ldstim11 ...... b:5 t:5 ................ \ + &ldst sp=%assemble_sp disp=%assemble_11a \ + m=%ma2_to_m x=0 scale=0 size=3 @ldstim14 ...... b:5 t:5 ................ \ &ldst sp=%assemble_sp disp=%assemble_16 \ x=0 scale=0 m=0 diff --git a/target/hppa/translate.c b/target/hppa/translate.c index cbe44ef75a..40b9ff6d59 100644 --- a/target/hppa/translate.c +++ b/target/hppa/translate.c @@ -121,12 +121,6 @@ static int expand_shl2(DisasContext *ctx, int val) return val << 2; } -/* Used for fp memory ops. */ -static int expand_shl3(DisasContext *ctx, int val) -{ - return val << 3; -} - /* Used for assemble_21. */ static int expand_shl11(DisasContext *ctx, int val) { @@ -144,6 +138,23 @@ static int assemble_6(DisasContext *ctx, int val) return (val ^ 31) + 1; } +/* Expander for assemble_16a(s,cat(im10a,0),i). */ +static int expand_11a(DisasContext *ctx, int val) +{ + /* + * @val is bit 0 and bits [4:15]. + * Swizzle thing around depending on PSW.W. + */ + int im10a = extract32(val, 1, 10); + int s = extract32(val, 11, 2); + int i = (-(val & 1) << 13) | (im10a << 3); + + if (ctx->tb_flags & PSW_W) { + i ^= s << 13; + } + return i; +} + /* Expander for assemble_16(s,im14). */ static int expand_16(DisasContext *ctx, int val) {