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([156.19.246.23]) by smtp.gmail.com with ESMTPSA id z24-20020a17090abd9800b002a56b3931dfsm11737859pjr.49.2024.04.24.16.31.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 24 Apr 2024 16:31:50 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v2 20/33] accel/tcg: Introduce translator_fake_ld Date: Wed, 24 Apr 2024 16:31:18 -0700 Message-Id: <20240424233131.988727-21-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240424233131.988727-1-richard.henderson@linaro.org> References: <20240424233131.988727-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::629; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x629.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Replace translator_fake_ldb, which required multiple calls, with translator_fake_ld, which can take all data at once. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- include/exec/translator.h | 8 ++++---- accel/tcg/translator.c | 5 ++--- target/s390x/tcg/translate.c | 8 ++++---- 3 files changed, 10 insertions(+), 11 deletions(-) diff --git a/include/exec/translator.h b/include/exec/translator.h index 8c3a8aa3d1..fc9fc64963 100644 --- a/include/exec/translator.h +++ b/include/exec/translator.h @@ -234,17 +234,17 @@ translator_ldq_swap(CPUArchState *env, DisasContextBase *db, } /** - * translator_fake_ldb - fake instruction load + * translator_fake_ld - fake instruction load * @db: Disassembly context - * @pc: program counter of instruction - * @insn8: byte of instruction + * @data: bytes of instruction + * @len: number of bytes * * This is a special case helper used where the instruction we are * about to translate comes from somewhere else (e.g. being * re-synthesised for s390x "ex"). It ensures we update other areas of * the translator with details of the executed instruction. */ -void translator_fake_ldb(DisasContextBase *db, vaddr pc, uint8_t insn8); +void translator_fake_ld(DisasContextBase *db, const void *data, size_t len); /** * translator_st diff --git a/accel/tcg/translator.c b/accel/tcg/translator.c index e968d530d8..14622b69a8 100644 --- a/accel/tcg/translator.c +++ b/accel/tcg/translator.c @@ -467,9 +467,8 @@ uint64_t translator_ldq(CPUArchState *env, DisasContextBase *db, vaddr pc) return tgt; } -void translator_fake_ldb(DisasContextBase *db, vaddr pc, uint8_t insn8) +void translator_fake_ld(DisasContextBase *db, const void *data, size_t len) { - assert(pc >= db->pc_first); db->fake_insn = true; - record_save(db, pc, &insn8, sizeof(insn8)); + record_save(db, db->pc_first, data, len); } diff --git a/target/s390x/tcg/translate.c b/target/s390x/tcg/translate.c index d74939389a..2eb787e401 100644 --- a/target/s390x/tcg/translate.c +++ b/target/s390x/tcg/translate.c @@ -6191,6 +6191,8 @@ static const DisasInsn *extract_insn(CPUS390XState *env, DisasContext *s) const DisasInsn *info; if (unlikely(s->ex_value)) { + uint64_t be_insn; + /* Drop the EX data now, so that it's clear on exception paths. */ tcg_gen_st_i64(tcg_constant_i64(0), tcg_env, offsetof(CPUS390XState, ex_value)); @@ -6200,10 +6202,8 @@ static const DisasInsn *extract_insn(CPUS390XState *env, DisasContext *s) ilen = s->ex_value & 0xf; /* Register insn bytes with translator so plugins work. */ - for (int i = 0; i < ilen; i++) { - uint8_t byte = extract64(insn, 56 - (i * 8), 8); - translator_fake_ldb(&s->base, pc + i, byte); - } + be_insn = cpu_to_be64(insn); + translator_fake_ld(&s->base, &be_insn, ilen); op = insn >> 56; } else { insn = ld_code2(env, s, pc);