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Thu, 30 May 2024 12:42:51 -0700 (PDT) Received: from draig.lan (localhost [IPv6:::1]) by draig.lan (Postfix) with ESMTP id A25505F8D5; Thu, 30 May 2024 20:42:50 +0100 (BST) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: qemu-devel@nongnu.org Cc: Marcel Apfelbaum , Cameron Esfahani , Alexandre Iooss , Yanan Wang , Paolo Bonzini , Eduardo Habkost , Sunil Muthuswamy , Richard Henderson , Pierrick Bouvier , =?utf-8?q?Philippe_Mathieu-?= =?utf-8?q?Daud=C3=A9?= , Mahmoud Mandour , Reinoud Zandijk , =?utf-8?q?Alex_Benn=C3=A9e?= , kvm@vger.kernel.org, Roman Bolshakov Subject: [PATCH 1/5] hw/core: expand on the alignment of CPUState Date: Thu, 30 May 2024 20:42:46 +0100 Message-Id: <20240530194250.1801701-2-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240530194250.1801701-1-alex.bennee@linaro.org> References: <20240530194250.1801701-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::635; envelope-from=alex.bennee@linaro.org; helo=mail-ej1-x635.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Make the relationship between CPUState, ArchCPU and cpu_env a bit clearer in the kdoc comments. Signed-off-by: Alex Bennée Reviewed-by: Pierrick Bouvier Reviewed-by: Philippe Mathieu-Daudé --- include/hw/core/cpu.h | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-) diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index bb398e8237..35d345371b 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -391,7 +391,8 @@ struct qemu_work_item; #define CPU_UNSET_NUMA_NODE_ID -1 /** - * CPUState: + * struct CPUState - common state of one CPU core or thread. + * * @cpu_index: CPU index (informative). * @cluster_index: Identifies which cluster this CPU is in. * For boards which don't define clusters or for "loose" CPUs not assigned @@ -439,10 +440,15 @@ struct qemu_work_item; * @kvm_fetch_index: Keeps the index that we last fetched from the per-vCPU * dirty ring structure. * - * State of one CPU core or thread. + * @neg_align: The CPUState is the common part of a concrete ArchCPU + * which is allocated when an individual CPU instance is created. As + * such care is taken is ensure there is no gap between between + * CPUState and CPUArchState within ArchCPU. * - * Align, in order to match possible alignment required by CPUArchState, - * and eliminate a hole between CPUState and CPUArchState within ArchCPU. + * @neg: The architectural register state ("cpu_env") immediately follows CPUState + * in ArchCPU and is passed to TCG code. The @neg structure holds some + * common TCG CPU variables which are accessed with a negative offset + * from cpu_env. */ struct CPUState { /*< private >*/