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([71.212.132.216]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-70242b2ff9dsm9091509b3a.212.2024.06.05.14.57.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 05 Jun 2024 14:57:42 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: qemu-s390x@nongnu.org, Ilya Leoshkevich Subject: [PATCH v2 02/10] target/s390x: Introduce gen_psw_addr_disp Date: Wed, 5 Jun 2024 14:57:31 -0700 Message-Id: <20240605215739.4758-3-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240605215739.4758-1-richard.henderson@linaro.org> References: <20240605215739.4758-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::436; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x436.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org In preparation for TARGET_TB_PCREL, reduce reliance on absolute values. Reviewed-by: Ilya Leoshkevich Signed-off-by: Richard Henderson --- target/s390x/tcg/translate.c | 25 +++++++++++++++---------- 1 file changed, 15 insertions(+), 10 deletions(-) diff --git a/target/s390x/tcg/translate.c b/target/s390x/tcg/translate.c index f25ae02a4e..bd4ad33802 100644 --- a/target/s390x/tcg/translate.c +++ b/target/s390x/tcg/translate.c @@ -167,6 +167,11 @@ static uint64_t inline_branch_hit[CC_OP_MAX]; static uint64_t inline_branch_miss[CC_OP_MAX]; #endif +static void gen_psw_addr_disp(DisasContext *s, TCGv_i64 dest, int64_t disp) +{ + tcg_gen_movi_i64(dest, s->base.pc_next + disp); +} + static void pc_to_link_info(TCGv_i64 out, DisasContext *s, uint64_t pc) { if (s->base.tb->flags & FLAG_MASK_32) { @@ -337,8 +342,7 @@ static void store_freg32_i64(int reg, TCGv_i64 v) static void update_psw_addr(DisasContext *s) { - /* psw.addr */ - tcg_gen_movi_i64(psw_addr, s->base.pc_next); + gen_psw_addr_disp(s, psw_addr, 0); } static void per_branch(DisasContext *s, TCGv_i64 dest) @@ -352,7 +356,7 @@ static void per_branch(DisasContext *s, TCGv_i64 dest) static void per_breaking_event(DisasContext *s) { - tcg_gen_movi_i64(gbea, s->base.pc_next); + gen_psw_addr_disp(s, gbea, 0); } static void update_cc_op(DisasContext *s) @@ -1086,11 +1090,11 @@ static DisasJumpType help_goto_direct(DisasContext *s, int64_t disp) } if (use_goto_tb(s, dest)) { tcg_gen_goto_tb(0); - tcg_gen_movi_i64(psw_addr, dest); + gen_psw_addr_disp(s, psw_addr, disp); tcg_gen_exit_tb(s->base.tb, 0); return DISAS_NORETURN; } else { - tcg_gen_movi_i64(psw_addr, dest); + gen_psw_addr_disp(s, psw_addr, disp); return DISAS_PC_CC_UPDATED; } } @@ -1121,7 +1125,7 @@ static DisasJumpType help_branch(DisasContext *s, DisasCompare *c, * still need a conditional call to helper_per_branch. */ if (c->cond == TCG_COND_ALWAYS - || (dest == s->pc_tmp && + || (disp == s->ilen && !(s->base.tb->flags & FLAG_MASK_PER_BRANCH))) { return help_goto_direct(s, disp); } @@ -1154,7 +1158,7 @@ static DisasJumpType help_branch(DisasContext *s, DisasCompare *c, /* Branch taken. */ per_breaking_event(s); if (is_imm) { - tcg_gen_movi_i64(psw_addr, dest); + gen_psw_addr_disp(s, psw_addr, disp); } else { tcg_gen_mov_i64(psw_addr, cdest); } @@ -1170,7 +1174,7 @@ static DisasJumpType help_branch(DisasContext *s, DisasCompare *c, gen_set_label(lab); /* Branch not taken. */ - tcg_gen_movi_i64(psw_addr, s->pc_tmp); + gen_psw_addr_disp(s, psw_addr, s->ilen); if (use_goto_tb(s, s->pc_tmp)) { tcg_gen_goto_tb(1); tcg_gen_exit_tb(s->base.tb, 1); @@ -5758,7 +5762,8 @@ static TCGv gen_ri2(DisasContext *s) disas_jdest(s, i2, is_imm, imm, ri2); if (is_imm) { - ri2 = tcg_constant_i64(s->base.pc_next + (int64_t)imm * 2); + ri2 = tcg_temp_new_i64(); + gen_psw_addr_disp(s, ri2, (int64_t)imm * 2); } return ri2; @@ -6367,7 +6372,7 @@ static DisasJumpType translate_one(CPUS390XState *env, DisasContext *s) s->base.is_jmp = DISAS_PC_CC_UPDATED; /* fall through */ case DISAS_NEXT: - tcg_gen_movi_i64(psw_addr, s->pc_tmp); + gen_psw_addr_disp(s, psw_addr, s->ilen); break; default: break;