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[92.88.170.52]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-427d2a95530sm55455065e9.45.2024.07.19.11.11.52 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 19 Jul 2024 11:11:54 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Marc-Andr=C3=A9_Lureau?= , =?utf-8?q?Alex_Benn=C3=A9e?= , qemu-arm@nongnu.org, Mark Cave-Ayland , Tong Ho , Manos Pitsidianakis , Peter Maydell , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Richard Henderson Subject: [PATCH v5 11/16] hw/char/pl011: Rename RX FIFO methods Date: Fri, 19 Jul 2024 20:10:36 +0200 Message-ID: <20240719181041.49545-12-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240719181041.49545-1-philmd@linaro.org> References: <20240719181041.49545-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42b; envelope-from=philmd@linaro.org; helo=mail-wr1-x42b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org In preparation of having a TX FIFO, rename the RX FIFO methods. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alex Bennée Reviewed-by: Richard Henderson --- hw/char/pl011.c | 12 ++++++------ hw/char/trace-events | 4 ++-- 2 files changed, 8 insertions(+), 8 deletions(-) diff --git a/hw/char/pl011.c b/hw/char/pl011.c index 0ce91c13d3..c42c6d1ac2 100644 --- a/hw/char/pl011.c +++ b/hw/char/pl011.c @@ -174,7 +174,7 @@ static inline void pl011_reset_tx_fifo(PL011State *s) s->flags |= PL011_FLAG_TXFE; } -static void pl011_put_fifo(void *opaque, uint32_t value) +static void pl011_fifo_rx_put(void *opaque, uint32_t value) { PL011State *s = (PL011State *)opaque; int slot; @@ -185,9 +185,9 @@ static void pl011_put_fifo(void *opaque, uint32_t value) s->read_fifo[slot] = value; s->read_count++; s->flags &= ~PL011_FLAG_RXFE; - trace_pl011_put_fifo(value, s->read_count); + trace_pl011_fifo_rx_put(value, s->read_count); if (s->read_count == pipe_depth) { - trace_pl011_put_fifo_full(); + trace_pl011_fifo_rx_full(); s->flags |= PL011_FLAG_RXFF; } if (s->read_count == s->read_trigger) { @@ -221,7 +221,7 @@ static void pl011_loopback_tx(PL011State *s, uint32_t value) * * For simplicity, the above described is not emulated. */ - pl011_put_fifo(s, value); + pl011_fifo_rx_put(s, value); } static void pl011_write_txdata(PL011State *s, uint8_t data) @@ -502,13 +502,13 @@ static void pl011_receive(void *opaque, const uint8_t *buf, int size) return; } - pl011_put_fifo(opaque, *buf); + pl011_fifo_rx_put(opaque, *buf); } static void pl011_event(void *opaque, QEMUChrEvent event) { if (event == CHR_EVENT_BREAK && !pl011_loopback_enabled(opaque)) { - pl011_put_fifo(opaque, DR_BE); + pl011_fifo_rx_put(opaque, DR_BE); } } diff --git a/hw/char/trace-events b/hw/char/trace-events index 8875758076..59e1f734a7 100644 --- a/hw/char/trace-events +++ b/hw/char/trace-events @@ -58,8 +58,8 @@ pl011_read(uint32_t addr, uint32_t value, const char *regname) "addr 0x%03x valu pl011_read_fifo(int read_count) "FIFO read, read_count now %d" pl011_write(uint32_t addr, uint32_t value, const char *regname) "addr 0x%03x value 0x%08x reg %s" pl011_can_receive(uint32_t lcr, int read_count, int r) "LCR 0x%08x read_count %d returning %d" -pl011_put_fifo(uint32_t c, int read_count) "new char 0x%x read_count now %d" -pl011_put_fifo_full(void) "FIFO now full, RXFF set" +pl011_fifo_rx_put(uint32_t c, int read_count) "new char 0x%02x read_count now %d" +pl011_fifo_rx_full(void) "RX FIFO now full, RXFF set" pl011_baudrate_change(unsigned int baudrate, uint64_t clock, uint32_t ibrd, uint32_t fbrd) "new baudrate %u (clk: %" PRIu64 "hz, ibrd: %" PRIu32 ", fbrd: %" PRIu32 ")" # cmsdk-apb-uart.c