From patchwork Tue Oct 22 10:56:01 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 837551 Delivered-To: patch@linaro.org Received: by 2002:a5d:50c9:0:b0:37d:45d0:187 with SMTP id f9csp2475962wrt; Tue, 22 Oct 2024 03:59:33 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCWTnkixlV2ql+bL7a3QOM3UA0wHyOesFFvXw+1KiUKOifeuM10uAFOSOjk5MOItytgyuIzKFw==@linaro.org X-Google-Smtp-Source: AGHT+IEinQwaGoxLXTvWSCBrRnFV2miP7YyKqMhooFw3pywjIhwxNTJeoh6JA0abRj6Vb9+sxvy0 X-Received: by 2002:a05:620a:48d:b0:7af:cff1:c770 with SMTP id af79cd13be357-7b157becf8cmr1731352285a.55.1729594773367; Tue, 22 Oct 2024 03:59:33 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1729594773; cv=none; d=google.com; s=arc-20240605; b=c/ql1q5HdzPok7OQIOQrEJWX6N06HpEwxk5BmsRRcOP9SsLHykdiXEOzvY1PQUOn90 1tXcc8balGR1x5lSebV915q+61BCB6is+riFc3laWF6w1o9hppuplsoIcZi/5KetJOov VfqE/6+Q9Oj21St1TxvBmBtoqI3WPAPtKQbpI+elN/3bB99SW/Q9TIqnKl5njq0q80Pj 08BTcvkFndBdU6fe3keKneb1BcKJzRUNZAcwzBcCigFMxu83TnZf/RiFIuCLD3aK5rmu MeSG0rIorUj6LSynzDpwzgrvv7RiGnq8iJfLKRzE8trc79ASrAaHSGQZE1IdsImT2Qws /mKw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=HOyxXWkbmxyeJp1271bZ6nHrEgwT9agO1ZydqcSHiVY=; fh=JIYLOQ6EaccVC1Ctq0ikRtDAeee/qFNo76yJPhd9cec=; b=U2a5R9ejcN+/FqU4V3SNyr2Vm4IYr8J3otcLrHulHOiYztfKaJniuuGJj23oemLGjj 0CuTObgL/aGH5TeJgQgqhnqegjswsil+k7UtpUPmquzi1U4asVCzI9P1VqtFjTisbwg4 dY4vvPyM7mHOY4QPMT3FLWGll6MdIsh/AcuBPkyzlKjLTZ+1vdEwYnDRdCmFpp0Jpo92 8nYwFOLr5bGO6XGujg38YYUzW/3YCkruu1IloYH7/Z/AqX/dfi/grFqdFfSYU1EZiY1C 1AvQWssfpSIK6IhMdXDWGRKtaCF7IpDz3UYMddvh/pIRq5XnrXrBZwSKCaoLvYoADL5a eNng==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=VZn8DrFi; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id af79cd13be357-7b165a69efasi606233285a.276.2024.10.22.03.59.33 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 22 Oct 2024 03:59:33 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=VZn8DrFi; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1t3CZ6-0001rL-Gc; Tue, 22 Oct 2024 06:56:40 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1t3CYv-0001lF-62 for qemu-devel@nongnu.org; Tue, 22 Oct 2024 06:56:29 -0400 Received: from mail-ej1-x636.google.com ([2a00:1450:4864:20::636]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1t3CYt-00022o-Ae for qemu-devel@nongnu.org; Tue, 22 Oct 2024 06:56:28 -0400 Received: by mail-ej1-x636.google.com with SMTP id a640c23a62f3a-a99e3b3a411so1054242866b.0 for ; Tue, 22 Oct 2024 03:56:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1729594586; x=1730199386; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=HOyxXWkbmxyeJp1271bZ6nHrEgwT9agO1ZydqcSHiVY=; b=VZn8DrFiuIHwxVXCHZtWUH2Er6GDLnoz/aq5guxUrNWHZpyge4xbzfGhA+RW7k16Dl AZ9vVTAffjDrDarV55DmbCSQ5ZJrzNPPCnTxlVU0FgMV0yERUj6A1c//JRmmW5WceStm YaabpzzOUBQJR47ftiRg/SfHgkm8dAaqzOrBKZV0IPkooxGwxyGUmNc5qrd8iL8gA3sW hhAaSE9Pijs08oOTRIwcn5IOo2jJr2lGtwKBgxhpTWv5SOv+vb/4J0d2Eyd4MwUOXYLf AhZul2SAQ6zJMY0G4wSwORx9nJRe60GmZU2imHMklAZT2nvUEkEwYXYPSzBfD63meBJq jrtA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1729594586; x=1730199386; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=HOyxXWkbmxyeJp1271bZ6nHrEgwT9agO1ZydqcSHiVY=; b=oYsCIQ7yV8bYIYnAGqvoV8pf3mBnUZU8PmuezCp2x5qwm06MME8HHMSuFtJNqvu6gw 75gB0m8XcI1rMLwYjExEQzvdDcgfSkQUYJHq5hIWv1UCswAFqrtF2BFWZJL2bRSAhU43 iARVjkbrZi6AaTzHvmLK1R04eZL4twB1stxwN2FpMhMnw4gd6c//5tuwC6o6zCFpnKOD TCX88Eazn7bswS4sg0iC1ikYk8pE2UPtZe/mai8yTMWHXL/3tbZXaNaNzEEcLM25G3fM dBfbrYr1O2XZ/wFzOGzkus5E6dYEl5pDW5K8JZPFXBkgmJeNkOWqqwjk+CifnN9TfDha UJyQ== X-Gm-Message-State: AOJu0YyCU3EZmJUuf8nb/0/F8wjUcdqAiljnUfE/fJRKRRcsbqjtcZQO Y9y+y8i8jiEZiaAg7IaEzH4RbdC5erEbrPAFTJCWNQG2Vq3NDNE9dWtWf3KGG+c= X-Received: by 2002:a17:907:1c85:b0:a9a:597:8cc9 with SMTP id a640c23a62f3a-a9aaa523356mr288374566b.12.1729594585591; Tue, 22 Oct 2024 03:56:25 -0700 (PDT) Received: from draig.lan ([85.9.250.243]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a9a91370e91sm320592666b.123.2024.10.22.03.56.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 22 Oct 2024 03:56:19 -0700 (PDT) Received: from draig.lan (localhost [IPv6:::1]) by draig.lan (Postfix) with ESMTP id 465EC5F942; Tue, 22 Oct 2024 11:56:15 +0100 (BST) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: qemu-devel@nongnu.org Cc: Beraldo Leal , Laurent Vivier , Wainer dos Santos Moschetta , Mahmoud Mandour , Jiaxun Yang , =?utf-8?q?Alex_Benn=C3=A9e?= , Yanan Wang , Thomas Huth , John Snow , =?utf-8?q?Marc-Andr=C3=A9_Lureau?= , qemu-arm@nongnu.org, =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Eduardo Habkost , devel@lists.libvirt.org, Cleber Rosa , kvm@vger.kernel.org, =?utf-8?q?Philippe_Mat?= =?utf-8?q?hieu-Daud=C3=A9?= , Alexandre Iooss , Peter Maydell , Richard Henderson , Riku Voipio , Zhao Liu , Marcelo Tosatti , "Edgar E. Iglesias" , Marcel Apfelbaum , Pierrick Bouvier , Paolo Bonzini , Ilya Leoshkevich Subject: [PATCH v2 07/20] tests/tcg/x86_64: Add cross-modifying code test Date: Tue, 22 Oct 2024 11:56:01 +0100 Message-Id: <20241022105614.839199-8-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20241022105614.839199-1-alex.bennee@linaro.org> References: <20241022105614.839199-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::636; envelope-from=alex.bennee@linaro.org; helo=mail-ej1-x636.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Ilya Leoshkevich commit f025692c992c ("accel/tcg: Clear PAGE_WRITE before translation") fixed cross-modifying code handling, but did not add a test. The changed code was further improved recently [1], and I was not sure whether these modifications were safe (spoiler: they were fine). Add a test to make sure there are no regressions. [1] https://lists.gnu.org/archive/html/qemu-devel/2022-09/msg00034.html Signed-off-by: Ilya Leoshkevich Message-Id: <20241001150617.9977-1-iii@linux.ibm.com> Signed-off-by: Alex Bennée Reviewed-by: Pierrick Bouvier Reviewed-by: Pierrick Bouvier --- tests/tcg/x86_64/cross-modifying-code.c | 80 +++++++++++++++++++++++++ tests/tcg/x86_64/Makefile.target | 4 ++ 2 files changed, 84 insertions(+) create mode 100644 tests/tcg/x86_64/cross-modifying-code.c diff --git a/tests/tcg/x86_64/cross-modifying-code.c b/tests/tcg/x86_64/cross-modifying-code.c new file mode 100644 index 0000000000..2704df6061 --- /dev/null +++ b/tests/tcg/x86_64/cross-modifying-code.c @@ -0,0 +1,80 @@ +/* + * Test patching code, running in one thread, from another thread. + * + * Intel SDM calls this "cross-modifying code" and recommends a special + * sequence, which requires both threads to cooperate. + * + * Linux kernel uses a different sequence that does not require cooperation and + * involves patching the first byte with int3. + * + * Finally, there is user-mode software out there that simply uses atomics, and + * that seems to be good enough in practice. Test that QEMU has no problems + * with this as well. + */ + +#include +#include +#include +#include + +void add1_or_nop(long *x); +asm(".pushsection .rwx,\"awx\",@progbits\n" + ".globl add1_or_nop\n" + /* addq $0x1,(%rdi) */ + "add1_or_nop: .byte 0x48, 0x83, 0x07, 0x01\n" + "ret\n" + ".popsection\n"); + +#define THREAD_WAIT 0 +#define THREAD_PATCH 1 +#define THREAD_STOP 2 + +static void *thread_func(void *arg) +{ + int val = 0x0026748d; /* nop */ + + while (true) { + switch (__atomic_load_n((int *)arg, __ATOMIC_SEQ_CST)) { + case THREAD_WAIT: + break; + case THREAD_PATCH: + val = __atomic_exchange_n((int *)&add1_or_nop, val, + __ATOMIC_SEQ_CST); + break; + case THREAD_STOP: + return NULL; + default: + assert(false); + __builtin_unreachable(); + } + } +} + +#define INITIAL 42 +#define COUNT 1000000 + +int main(void) +{ + int command = THREAD_WAIT; + pthread_t thread; + long x = 0; + int err; + int i; + + err = pthread_create(&thread, NULL, &thread_func, &command); + assert(err == 0); + + __atomic_store_n(&command, THREAD_PATCH, __ATOMIC_SEQ_CST); + for (i = 0; i < COUNT; i++) { + add1_or_nop(&x); + } + __atomic_store_n(&command, THREAD_STOP, __ATOMIC_SEQ_CST); + + err = pthread_join(thread, NULL); + assert(err == 0); + + assert(x >= INITIAL); + assert(x <= INITIAL + COUNT); + + return EXIT_SUCCESS; +} diff --git a/tests/tcg/x86_64/Makefile.target b/tests/tcg/x86_64/Makefile.target index 783ab5b21a..d6dff559c7 100644 --- a/tests/tcg/x86_64/Makefile.target +++ b/tests/tcg/x86_64/Makefile.target @@ -17,6 +17,7 @@ X86_64_TESTS += cmpxchg X86_64_TESTS += adox X86_64_TESTS += test-1648 X86_64_TESTS += test-2175 +X86_64_TESTS += cross-modifying-code TESTS=$(MULTIARCH_TESTS) $(X86_64_TESTS) test-x86_64 else TESTS=$(MULTIARCH_TESTS) @@ -27,6 +28,9 @@ adox: CFLAGS=-O2 run-test-i386-ssse3: QEMU_OPTS += -cpu max run-plugin-test-i386-ssse3-%: QEMU_OPTS += -cpu max +cross-modifying-code: CFLAGS+=-pthread +cross-modifying-code: LDFLAGS+=-pthread + test-x86_64: LDFLAGS+=-lm -lc test-x86_64: test-i386.c test-i386.h test-i386-shift.h test-i386-muldiv.h $(CC) $(CFLAGS) $< -o $@ $(LDFLAGS)