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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-387824c2bf2sm7010324f8f.55.2024.12.13.05.34.17 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 13 Dec 2024 05:34:17 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, Gerd Hoffmann , =?utf-8?q?Daniel?= =?utf-8?q?_P_=2E_Berrang=C3=A9?= , =?utf-8?q?Philippe_?= =?utf-8?q?Mathieu-Daud=C3=A9?= Subject: [PATCH v2 5/7] hw/pci: Add pci_bus_add_fw_cfg_extra_pci_roots() helper Date: Fri, 13 Dec 2024 14:33:50 +0100 Message-ID: <20241213133352.10915-6-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241213133352.10915-1-philmd@linaro.org> References: <20241213133352.10915-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::333; envelope-from=philmd@linaro.org; helo=mail-wm1-x333.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org pci_bus_add_fw_cfg_extra_pci_roots() calls the fw_cfg API with PCI bus specific arguments. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Daniel P. Berrangé --- include/hw/pci/pci.h | 3 +++ hw/pci/pci.c | 16 ++++++++++++++++ 2 files changed, 19 insertions(+) diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h index c0717e31219..603c456c3a8 100644 --- a/include/hw/pci/pci.h +++ b/include/hw/pci/pci.h @@ -297,6 +297,9 @@ int pci_bus_get_irq_level(PCIBus *bus, int irq_num); uint32_t pci_bus_get_slot_reserved_mask(PCIBus *bus); void pci_bus_set_slot_reserved_mask(PCIBus *bus, uint32_t mask); void pci_bus_clear_slot_reserved_mask(PCIBus *bus, uint32_t mask); +bool pci_bus_add_fw_cfg_extra_pci_roots(FWCfgState *fw_cfg, + PCIBus *bus, + Error **errp); /* 0 <= pin <= 3 0 = INTA, 1 = INTB, 2 = INTC, 3 = INTD */ static inline int pci_swizzle(int slot, int pin) { diff --git a/hw/pci/pci.c b/hw/pci/pci.c index 8844251eceb..bf0a1840dbe 100644 --- a/hw/pci/pci.c +++ b/hw/pci/pci.c @@ -217,6 +217,22 @@ static uint16_t pcibus_numa_node(PCIBus *bus) return NUMA_NODE_UNASSIGNED; } +bool pci_bus_add_fw_cfg_extra_pci_roots(FWCfgState *fw_cfg, + PCIBus *bus, + Error **errp) +{ + Object *obj; + + if (!bus) { + return true; + } + obj = OBJECT(bus); + + return fw_cfg_add_file_from_generator(fw_cfg, obj->parent, + object_get_canonical_path_component(obj), + "etc/extra-pci-roots", errp); +} + static GByteArray *pci_bus_fw_cfg_gen_data(Object *obj, Error **errp) { PCIBus *bus = PCI_BUS(obj);