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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4399b430912sm30933125e9.0.2025.02.19.13.08.47 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 19 Feb 2025 13:08:48 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: =?utf-8?q?Marc-Andr=C3=A9_Lureau?= , qemu-devel@nongnu.org Cc: Evgeny Iakovlev , Rayhan Faizel , Luc Michel , Paolo Bonzini , Yoshinori Sato , Magnus Damm , Peter Maydell , =?utf-8?q?Alex_Benn=C3=A9e?= , Thomas Huth , Shin'ichiro Kawasaki , =?utf-8?q?Philippe_Math?= =?utf-8?q?ieu-Daud=C3=A9?= , qemu-arm@nongnu.org, Richard Henderson Subject: [PATCH 1/9] hw/char/pl011: Warn when using disabled receiver Date: Wed, 19 Feb 2025 22:08:33 +0100 Message-ID: <20250219210841.94797-2-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250219210841.94797-1-philmd@linaro.org> References: <20250219210841.94797-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32e; envelope-from=philmd@linaro.org; helo=mail-wm1-x32e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org We shouldn't receive characters when the full UART or its receiver is disabled. However we don't want to break the possibly incomplete "my first bare metal assembly program"s, so we choose to simply display a warning when this occurs. Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- hw/char/pl011.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/hw/char/pl011.c b/hw/char/pl011.c index 06ce851044d..60cea1d9a16 100644 --- a/hw/char/pl011.c +++ b/hw/char/pl011.c @@ -85,6 +85,7 @@ DeviceState *pl011_create(hwaddr addr, qemu_irq irq, Chardev *chr) #define CR_OUT1 (1 << 12) #define CR_RTS (1 << 11) #define CR_DTR (1 << 10) +#define CR_RXE (1 << 9) #define CR_TXE (1 << 8) #define CR_LBE (1 << 7) #define CR_UARTEN (1 << 0) @@ -487,6 +488,12 @@ static int pl011_can_receive(void *opaque) PL011State *s = (PL011State *)opaque; int r; + if (!(s->cr & CR_UARTEN)) { + qemu_log_mask(LOG_GUEST_ERROR, "PL011 reading data on disabled UART\n"); + } + if (!(s->cr & CR_RXE)) { + qemu_log_mask(LOG_GUEST_ERROR, "PL011 reading data on disabled TX UART\n"); + } r = s->read_count < pl011_get_fifo_depth(s); trace_pl011_can_receive(s->lcr, s->read_count, r); return r;