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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-39efa43ca78sm3293378f8f.47.2025.04.18.10.30.15 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 18 Apr 2025 10:30:15 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Pierrick Bouvier Cc: Richard Henderson , Anton Johansson Subject: [RFC PATCH v3 14/14] hw/arm/virt: Replace TARGET_AARCH64 -> target_aarch64() Date: Fri, 18 Apr 2025 19:29:08 +0200 Message-ID: <20250418172908.25147-15-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250418172908.25147-1-philmd@linaro.org> References: <20250418172908.25147-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42e; envelope-from=philmd@linaro.org; helo=mail-wr1-x42e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Replace the target-specific TARGET_AARCH64 definition by a call to the generic target_aarch64() helper. Signed-off-by: Philippe Mathieu-Daudé --- This removes the last TARGET_AARCH64 in hw/arm/. --- hw/arm/virt.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 48a0c3588ce..d5bb9cf0e8f 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -32,6 +32,7 @@ #include "qemu/datadir.h" #include "qemu/units.h" #include "qemu/option.h" +#include "qemu/target_info.h" #include "monitor/qdev.h" #include "hw/sysbus.h" #include "hw/arm/boot.h" @@ -3138,7 +3139,7 @@ static void virt_machine_class_init(ObjectClass *oc, void *data) #ifdef CONFIG_TCG machine_class_add_valid_cpu_type(mc, ARM_CPU_TYPE_NAME("cortex-a7")); machine_class_add_valid_cpu_type(mc, ARM_CPU_TYPE_NAME("cortex-a15")); -#ifdef TARGET_AARCH64 + if (target_aarch64()) { machine_class_add_valid_cpu_type(mc, ARM_CPU_TYPE_NAME("cortex-a35")); machine_class_add_valid_cpu_type(mc, ARM_CPU_TYPE_NAME("cortex-a55")); machine_class_add_valid_cpu_type(mc, ARM_CPU_TYPE_NAME("cortex-a72")); @@ -3148,15 +3149,15 @@ static void virt_machine_class_init(ObjectClass *oc, void *data) machine_class_add_valid_cpu_type(mc, ARM_CPU_TYPE_NAME("neoverse-n1")); machine_class_add_valid_cpu_type(mc, ARM_CPU_TYPE_NAME("neoverse-v1")); machine_class_add_valid_cpu_type(mc, ARM_CPU_TYPE_NAME("neoverse-n2")); -#endif /* TARGET_AARCH64 */ + } #endif /* CONFIG_TCG */ -#ifdef TARGET_AARCH64 + if (target_aarch64()) { machine_class_add_valid_cpu_type(mc, ARM_CPU_TYPE_NAME("cortex-a53")); machine_class_add_valid_cpu_type(mc, ARM_CPU_TYPE_NAME("cortex-a57")); #if defined(CONFIG_KVM) || defined(CONFIG_HVF) machine_class_add_valid_cpu_type(mc, ARM_CPU_TYPE_NAME("host")); #endif /* CONFIG_KVM || CONFIG_HVF */ -#endif /* TARGET_AARCH64 */ + } machine_class_add_valid_cpu_type(mc, ARM_CPU_TYPE_NAME("max")); mc->init = machvirt_init;