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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4406d5ace47sm175128875e9.15.2025.04.22.07.56.31 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 22 Apr 2025 07:56:31 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Pierrick Bouvier Cc: Richard Henderson , Anton Johansson Subject: [RFC PATCH v4 19/19] hw/arm/virt: Get default CPU type at runtime Date: Tue, 22 Apr 2025 16:55:01 +0200 Message-ID: <20250422145502.70770-20-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250422145502.70770-1-philmd@linaro.org> References: <20250422145502.70770-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::329; envelope-from=philmd@linaro.org; helo=mail-wm1-x329.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Prefer MachineClass::get_default_cpu_type() over MachineClass::default_cpu_type to get CPU type, evaluating TCG availability at runtime calling tcg_enabled(). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- This removes the last use of CONFIG_TCG in hw/arm/. --- hw/arm/virt.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 4e11272a3ac..df8dda812cc 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -3131,6 +3131,12 @@ static int virt_hvf_get_physical_address_range(MachineState *ms) return requested_ipa_size; } +static const char *virt_get_default_cpu_type(const MachineState *ms) +{ + return tcg_enabled() ? ARM_CPU_TYPE_NAME("cortex-a15") + : ARM_CPU_TYPE_NAME("max"); +} + static GSList *virt_get_valid_cpu_types(const MachineState *ms) { GSList *vct = NULL; @@ -3188,11 +3194,7 @@ static void virt_machine_class_init(ObjectClass *oc, void *data) mc->minimum_page_bits = 12; mc->possible_cpu_arch_ids = virt_possible_cpu_arch_ids; mc->cpu_index_to_instance_props = virt_cpu_index_to_props; -#ifdef CONFIG_TCG - mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a15"); -#else - mc->default_cpu_type = ARM_CPU_TYPE_NAME("max"); -#endif + mc->get_default_cpu_type = virt_get_default_cpu_type; mc->get_valid_cpu_types = virt_get_valid_cpu_types; mc->get_default_cpu_node_id = virt_get_default_cpu_node_id; mc->kvm_type = virt_kvm_type;