From patchwork Tue Apr 22 19:27:00 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 883094 Delivered-To: patch@linaro.org Received: by 2002:a5d:474d:0:b0:38f:210b:807b with SMTP id o13csp2593316wrs; Tue, 22 Apr 2025 12:51:49 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCXefUZqJ4uyyu7LBWUyKu8ZInh75+vlw2bZPNLU2m5kcUFMBZX+/NfMjZLEwSw8m0R40ep/8w==@linaro.org X-Google-Smtp-Source: AGHT+IEki2BCR05CdqDWzFkYGGn5lUSA52kQGAyRyllwsGLNlF+GBB3g+yW/GDEqtrKNa8qihYYd X-Received: by 2002:a05:620a:170a:b0:7c7:a629:8ae5 with SMTP id af79cd13be357-7c92805fdf3mr3210075385a.56.1745351509477; Tue, 22 Apr 2025 12:51:49 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1745351509; cv=none; d=google.com; s=arc-20240605; b=QOX7HnMX79U3WY6cp5aiF4bWh1NUVOyHFd+Vx4Rv8ZdfdmwgkaLUk/3TPp5qdEtlh3 r83g03mJluT/oRkrNcJ7MbRcM5a8RUrzXDHsyh0bsSI9VriusrLJpE9jsJF/aJvNeg8K bwHzrRyoOLBSz1bFiV8g4E87o+8+ZWul/+V8UbK50I0b9McJ59EMYIT84M0fijwEb0LH tj6HCtrt/dXZTPvnGYBxcwnDnojrC6ikW99HqWBlcc+X0g/b3Nv7XwkJ7h6Y0q2h2L2o Og7IBHgRWjcPhKEhKhHtp3LSbZGtm6AOIEAX9+/fIiDi34UYffwOZKG7s1G0dq955LRO 6NuQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=BPrUJL2Wwt5H6m+qbEougiZhbCqsapatk+AvGECCLZ0=; fh=kQadAhxV42GJ3cd2VUw1RyURv/zJQGvmUdF7iLEVTtc=; b=Hmk6lPtqUSVb7KPiPaWHzcEdCV0U77egelNPI64Gj5ClhiLmX2R8wuQRP9S5h1zo/f L71Er2D5XP1bjHCPfkNRswWeVSVBpHtLClk1XiG6JL5zYpPxcmCua5TeVL/NdI5L6W/v HN9uxHS0Re9jTRAQ/tiNU83Hgjz7XRQMoYSSoEp7XtqdpkKUPfLUapk7TGEyCwAbPEtb cc9UrfS9y/44/dJ//l/qou04fdY/pcEvVQ5b/2fxR8Ql8D9Z4a7y5wPbRA8L807rBhgf XWgkM9Lb5peOnGdeIeWQcaPh0qAI4FGncbfBSV5sxzodmRa3zl1Az2XIcWJPKKPpmQt/ O6zg==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="xFOWXr/p"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id af79cd13be357-7c925b7f7aasi1139251385a.263.2025.04.22.12.51.49 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 22 Apr 2025 12:51:49 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="xFOWXr/p"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1u7JPi-0007Ee-Nz; Tue, 22 Apr 2025 15:36:15 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1u7JLp-00010F-6G for qemu-devel@nongnu.org; Tue, 22 Apr 2025 15:32:13 -0400 Received: from mail-pl1-x635.google.com ([2607:f8b0:4864:20::635]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1u7JLk-0006fD-Qk for qemu-devel@nongnu.org; Tue, 22 Apr 2025 15:32:12 -0400 Received: by mail-pl1-x635.google.com with SMTP id d9443c01a7336-22928d629faso54246575ad.3 for ; Tue, 22 Apr 2025 12:32:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1745350327; x=1745955127; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=BPrUJL2Wwt5H6m+qbEougiZhbCqsapatk+AvGECCLZ0=; b=xFOWXr/pAX60p4nMfpHEy/oKhjM3UbrdWyxzzpg/Qnqav87TU0iZgjp6XJyGqG6LOV aeqRy5mGl9l9xCBYG1fuKuZCIPkAILzgWzrxJdR3Y0ocA3vV9PCc5kwPO2CrI8dLz4Zy 02SCaBk7QYZbNX62Xzu+PXf50aJorN1s2YyW18pZN8aOuZPQhsOYDhe74dRXGzxztNxE X5SFWBsd9HxSchnBobUZ4I9iHvri6uzu3XPEGtXoNv8oDmFh/G8jsIJ/sLeDX/4xiiT2 9MPwTcEIX3+gp5B8JOKTU3r0IMBrEJZDY6/XOvSFZiPzhFydr5wrj92ZkMSq5TdlLIGh NSXA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1745350327; x=1745955127; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=BPrUJL2Wwt5H6m+qbEougiZhbCqsapatk+AvGECCLZ0=; b=C/yfYBDlqGiWtZVPIXvbIXU72yyiTg2Stjg3wuRiwKeXrMiA27QTHLn3d2cbRaiSW+ 5bQqAPtcfpIGkkn2AGyZX+XzXYXhdv+ANq0mDcN1slA/E1+Sn7sO3IsEgApOSYZA69DK prN4T9wYOXpzXpx6bDUX/YNULfVBcAczeT0Jyxtbn9kHxdRnzMYuWAd/ztn8MPSTRHDU aZskakewvzB+puSLsCMEgADGALH0TUCdncprjxxywvZTPUMYE+4H76Fxt+HwGshb6Mk5 sW0onlp5Z3n5B5hRqoRA+15vxHLqGMS+pXTjf/zoPa+qx/66Edl1iZRqLTqKYiYv25or Ngzg== X-Gm-Message-State: AOJu0Yx6kYsloV4QTerPN0wlmEAGOFpC7+ADry24UCQjQMBygDuDyoIH er6JdaEzk5hMrDPkQbyDkCNdNcn2qVA0LSEGb8WponJuUf/yW5EvtaGEltld3/yPLfJOjbo8rPo l X-Gm-Gg: ASbGnctHgRuQzx96yxpfMo4OxTgY31e2M2qhXsKxJ8WbbEZldT1onuwnLACzoSGvt7+ ZuIALMfDA/9052UgivVzm36+FDUr3TTFdOOMkBaIPzRi4+RH1POTFimFQpGTAV6UJIcW6AI9bl8 RLKwn+FMT0TKd2F6/0YbdwwSL+NkPmjy6V2DQvzi8Uk+hhT7x3C2GlddZNMg0sKmQwaut568UCE MKQgMwZTnV83hn8LNDklQqBYiBy6RNtmqgPpwVZNRHaSJL+OPf9xEb0tPypnhTbgRYUnSZakvL1 GTZ/8LJOxKCYosv7pWeT1bmibmHd4ad8CyExIdwOqtpQ5NjfrmfETHUF5ju6blTrDkdaELrZoe4 = X-Received: by 2002:a17:903:287:b0:223:33cb:335f with SMTP id d9443c01a7336-22c5337a07fmr210733565ad.3.1745350327132; Tue, 22 Apr 2025 12:32:07 -0700 (PDT) Received: from stoup.. (71-212-47-143.tukw.qwest.net. [71.212.47.143]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-22c50bdda3bsm89312635ad.27.2025.04.22.12.32.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 22 Apr 2025 12:32:06 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH 071/147] target/rx: Fix copy/paste typo (riscv -> rx) Date: Tue, 22 Apr 2025 12:27:00 -0700 Message-ID: <20250422192819.302784-72-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250422192819.302784-1-richard.henderson@linaro.org> References: <20250422192819.302784-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::635; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x635.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Philippe Mathieu-Daudé Rename riscv_cpu_mmu_index() -> rx_cpu_mmu_index(). Fixes: ef5cc166da1 ("target/rx: Populate CPUClass.mmu_index") Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Signed-off-by: Richard Henderson Message-ID: <20250401072052.25892-1-philmd@linaro.org> --- target/rx/cpu.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target/rx/cpu.c b/target/rx/cpu.c index 0ba0d55ab5..a240b3b3ce 100644 --- a/target/rx/cpu.c +++ b/target/rx/cpu.c @@ -66,7 +66,7 @@ static bool rx_cpu_has_work(CPUState *cs) (CPU_INTERRUPT_HARD | CPU_INTERRUPT_FIR); } -static int riscv_cpu_mmu_index(CPUState *cs, bool ifunc) +static int rx_cpu_mmu_index(CPUState *cs, bool ifunc) { return 0; } @@ -227,7 +227,7 @@ static void rx_cpu_class_init(ObjectClass *klass, void *data) &rcc->parent_phases); cc->class_by_name = rx_cpu_class_by_name; - cc->mmu_index = riscv_cpu_mmu_index; + cc->mmu_index = rx_cpu_mmu_index; cc->dump_state = rx_cpu_dump_state; cc->set_pc = rx_cpu_set_pc; cc->get_pc = rx_cpu_get_pc;