From patchwork Tue Apr 22 21:11:23 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 883160 Delivered-To: patch@linaro.org Received: by 2002:a5d:474d:0:b0:38f:210b:807b with SMTP id o13csp2623645wrs; Tue, 22 Apr 2025 14:13:07 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCXWqeB7C5Nw29AFBY8hHT4MZah02crf4L+VSw7p5fH8rfSc/3cabYhgjL1qWhsqfwDpXH8s9Q==@linaro.org X-Google-Smtp-Source: AGHT+IHZkW5UHVTClLhuCgBbRgLbl/XUsSzne3v1YonTLZBJY4F63Qpu+OaLs31X/ylPKe0eeYZH X-Received: by 2002:ac8:5dcb:0:b0:476:a03b:96e1 with SMTP id d75a77b69052e-47aec4c681bmr305342341cf.52.1745356387445; Tue, 22 Apr 2025 14:13:07 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1745356387; cv=none; d=google.com; s=arc-20240605; b=NP+5EiEDN8P4A9X8XXqI2OkR3od6BjAeg9OSKQ5Vec9LlQKS3MnGv+2Le+B+FdVZQp yV7pc/yNI1LdRp2Uku9sziP4DAlukrhvZrWSxlb6rCnGu2HWfVXsFwoqwfKJTOtAcGwj M61kWNDAgSDs8mzg5UbfoVSatIUCJxnjZXNjdKF5fThEjJeh7ACoUzC9uFXVaUdyKi+N k/jjULZOSYLCaMSty3wpk7MRExFzpQwF2v8Zq8mlXy3UFo/4Jo47Dbs4U/Vxb+MV3ThV VtA1nYMur1y/qcSDq5QVkTM3NlEZiUrVa+vcoDiFOloEKMI6C4JaUyWCCLd40adq4BGg z/uA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=HNdVjawedf7L7sOM+y7tXhWt3e7lZuKafuAKLevf0NY=; fh=vm85eyWrvOAHduw3sqEA+cYBqvHB7M0MHFcRJg7VWOo=; b=hk5pvjk3rOsnBbVTfwB9BBvAnmAM74KQgvVUqQAPgfVNC8IOu/7v7xihvaO2JeX+kF naxZNWSeBPhdRjdoemx67bvEcaTaLfTcEnyDPfDYfUt4ZcIB4NmMDnEWAI0nLU2OjnZe axpHy0cca+og3ZXyoNhKTb2jeAuvkjUp3dcNb6FDDDu38pTZnbrNp2fqdijwp96xnHR7 o/9tKpbw2Ec7YZhjCvJGaV3ET6dDcqkmhGMFAobKn1bjNF6mb7bOjF50sHzcls8KngcN 18Tq/pqDzzuTgxX6SCVtGHA975OhFW/KyuCO5yKSg8cnCoPhHjo1ChFkcbSYUBmqv6Cu ZmMg==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=tVbcbr8i; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id d75a77b69052e-47ae9c0e143si118003881cf.50.2025.04.22.14.13.07 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 22 Apr 2025 14:13:07 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=tVbcbr8i; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1u7KuT-0001US-Vr; Tue, 22 Apr 2025 17:12:06 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1u7Ku5-00013E-5P for qemu-devel@nongnu.org; Tue, 22 Apr 2025 17:11:42 -0400 Received: from mail-pl1-x629.google.com ([2607:f8b0:4864:20::629]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1u7Ktx-0000QJ-4G for qemu-devel@nongnu.org; Tue, 22 Apr 2025 17:11:34 -0400 Received: by mail-pl1-x629.google.com with SMTP id d9443c01a7336-22438c356c8so60056495ad.1 for ; Tue, 22 Apr 2025 14:11:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1745356291; x=1745961091; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=HNdVjawedf7L7sOM+y7tXhWt3e7lZuKafuAKLevf0NY=; b=tVbcbr8iGqYvQ9OpZmtHTg62Kk4RvN42uKsbdo7FAtyLPMCqboNbYLGqlh2aaI5QgY CLJPNSVgFzGgoj0mPNdEf7F8FI/UYK8Wu0m+5zVMGkZKmRHfA/OtObd3j9RzoW8uUtTi CeBstWq4utYH/f6eUrnXrDJmB8luBcpvdh1WUZ5+tey6j9CucjTkXz2NzFLvsI1of+kM WSCyhwI7JZxGR+53YXv3NO0mmisM0Y+TWE6MJcGSAOLaek0Bk0w+gBImmM6APqhK6gw2 HBH1YW7GmhD5p+2x4nUqd7CfT0pRYVNZ6PVrQjK+Xu8W0gnTQXjyNVMRLV7ppmYUm51G uViw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1745356291; x=1745961091; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=HNdVjawedf7L7sOM+y7tXhWt3e7lZuKafuAKLevf0NY=; b=rk8okG7zfHwRMuxWDyfHKE0ZnG/w2FHypQsqAM8/CuC93+0EKiCrXEXRpxO2UqR3L5 4VOb0aPz231dMDVtVuensWu+sqdM572adnPO9TgYZSNRajjuZvqKXq+NZK9u9lffjoya bVyXVCKj6ehlNY+CXBhGVQLDXfWNFf9hudyI2xW5ZyEVfrBXCayEw663S9HEHpbuaoaa 0gt3qHDmHsOrmFmLBhn76LqDaFdv+kB4IYY0gLYc8jTTPjy98TihUnAYhfRYHbYH9SJO DDbQe/cYfmiPq83/Q/ooYzeI5uQPs2OFG53gW6QuQjSJUddzLLdhY5ryXjHLN50/6O/A Satw== X-Gm-Message-State: AOJu0YwjFf42BpWcKAbIIplbdlkY3k0PYeJSkiRWhPGFWEx8junxxW0S WkLycOdSN+pCe4ArbWuhzvUwIm5+imSZ8IgzD8k73jwY8WcfuZ/d+np+6i4Co4wYhius4zMNKTG U X-Gm-Gg: ASbGnctZ+ETYMQflwVlQSyYbt3uH/Vmm6l5RI0fg2x1TOloqSYOuTHRQvgw7pz+COeO kvBRDk6cqikqj/sdyOWMOD7HfTOJ0PV2WVAL0SpMICOp+tjlGHXq7c1Kb5yYSMqQstq4g6FLwas 4zciesOXCIRC6jdKeyZQ8FPFWWPRUpXobuAoqPPVZSczYeqr+1cadS7uVZGt8H8KtDPzac9eg/j ayi98uEbTcMMTSfJL6lUmkg2gTwyL3Pk3Aa07ymb6CPNmn/8aNLfNMbvNGDBGjjqESBAEFBZp8L VOeQwWYm2848TkYGq17soo/lue4SHTCjvbYEHbPjj/FY/Pj0WQKakbZyPC98JILdnwJvUAMb6NQ = X-Received: by 2002:a17:903:1cf:b0:223:669f:ca2d with SMTP id d9443c01a7336-22c53611146mr274231935ad.35.1745356290776; Tue, 22 Apr 2025 14:11:30 -0700 (PDT) Received: from stoup.. (71-212-47-143.tukw.qwest.net. [71.212.47.143]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-73dbf8e4932sm9448160b3a.55.2025.04.22.14.11.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 22 Apr 2025 14:11:30 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Pierrick Bouvier Subject: [PULL 8/9] hw/avr: Prepare for TARGET_PAGE_SIZE > 256 Date: Tue, 22 Apr 2025 14:11:23 -0700 Message-ID: <20250422211124.305724-9-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250422211124.305724-1-richard.henderson@linaro.org> References: <20250422211124.305724-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::629; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x629.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org If i/o does not cover the entire first page, allocate a portion of ram as an i/o device, so that the entire first page is i/o. While memory_region_init_ram_device_ptr is happy to allocate the RAMBlock, it does not register the ram for migration. Do this by hand. Reviewed-by: Pierrick Bouvier Signed-off-by: Richard Henderson --- hw/avr/atmega.h | 1 + hw/avr/atmega.c | 39 ++++++++++++++++++++++++++++++++------- 2 files changed, 33 insertions(+), 7 deletions(-) diff --git a/hw/avr/atmega.h b/hw/avr/atmega.h index a99ee15c7e..9ac4678231 100644 --- a/hw/avr/atmega.h +++ b/hw/avr/atmega.h @@ -41,6 +41,7 @@ struct AtmegaMcuState { MemoryRegion flash; MemoryRegion eeprom; MemoryRegion sram; + MemoryRegion sram_io; DeviceState *io; AVRMaskState pwr[POWER_MAX]; AVRUsartState usart[USART_MAX]; diff --git a/hw/avr/atmega.c b/hw/avr/atmega.c index f6844bf118..11fab184de 100644 --- a/hw/avr/atmega.c +++ b/hw/avr/atmega.c @@ -19,6 +19,7 @@ #include "hw/sysbus.h" #include "qom/object.h" #include "hw/misc/unimp.h" +#include "migration/vmstate.h" #include "atmega.h" enum AtmegaPeripheral { @@ -224,8 +225,6 @@ static void atmega_realize(DeviceState *dev, Error **errp) char *devname; size_t i; - assert(mc->io_size <= 0x200); - if (!s->xtal_freq_hz) { error_setg(errp, "\"xtal-frequency-hz\" property must be provided."); return; @@ -240,11 +239,37 @@ static void atmega_realize(DeviceState *dev, Error **errp) qdev_realize(DEVICE(&s->cpu), NULL, &error_abort); cpudev = DEVICE(&s->cpu); - /* SRAM */ - memory_region_init_ram(&s->sram, OBJECT(dev), "sram", mc->sram_size, - &error_abort); - memory_region_add_subregion(get_system_memory(), - OFFSET_DATA + mc->io_size, &s->sram); + /* + * SRAM + * + * Softmmu is not able mix i/o and ram on the same page. + * Therefore in all cases, the first page exclusively contains i/o. + * + * If the MCU's i/o region matches the page size, then we can simply + * allocate all ram starting at the second page. Otherwise, we must + * allocate some ram as i/o to complete the first page. + */ + assert(mc->io_size == 0x100 || mc->io_size == 0x200); + if (mc->io_size >= TARGET_PAGE_SIZE) { + memory_region_init_ram(&s->sram, OBJECT(dev), "sram", mc->sram_size, + &error_abort); + memory_region_add_subregion(get_system_memory(), + OFFSET_DATA + mc->io_size, &s->sram); + } else { + int sram_io_size = TARGET_PAGE_SIZE - mc->io_size; + void *sram_io_mem = g_malloc0(sram_io_size); + + memory_region_init_ram_device_ptr(&s->sram_io, OBJECT(dev), "sram-as-io", + sram_io_size, sram_io_mem); + memory_region_add_subregion(get_system_memory(), + OFFSET_DATA + mc->io_size, &s->sram_io); + vmstate_register_ram(&s->sram_io, dev); + + memory_region_init_ram(&s->sram, OBJECT(dev), "sram", + mc->sram_size - sram_io_size, &error_abort); + memory_region_add_subregion(get_system_memory(), + OFFSET_DATA + TARGET_PAGE_SIZE, &s->sram); + } /* Flash */ memory_region_init_rom(&s->flash, OBJECT(dev),