From patchwork Tue Apr 29 05:00:01 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pierrick Bouvier X-Patchwork-Id: 885706 Delivered-To: patch@linaro.org Received: by 2002:a5d:4884:0:b0:38f:210b:807b with SMTP id g4csp143277wrq; Mon, 28 Apr 2025 22:02:08 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCWR54hpIAoRsiQCiq3nbbHF7IL3Id2H/HBpDDKvDs1GERmM5PLLdirQ1UWnXuUPqNyQq+V/hw==@linaro.org X-Google-Smtp-Source: AGHT+IF0r88nXOs754MkUZ2DkDw+Od82CmhMrPRpygXX+BUzc6Kz/MDd4hDPnmdimbIIHW0bjx1d X-Received: by 2002:ad4:5ced:0:b0:6ed:e3d:a1b1 with SMTP id 6a1803df08f44-6f4f1ba55a5mr27968856d6.10.1745902928529; Mon, 28 Apr 2025 22:02:08 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1745902928; cv=none; d=google.com; s=arc-20240605; b=Ugdxpzc3u8OKH5Q41QnyyW5jHmcaQV1ZRZMLAgOXXzkpn4fZ1vVKKTK9hyfmtVCovg qgkIXkHALiYxE57AeRFiB6kLwmS3wj7nDKhCCU1kGkm34ewDrkE+cjwA9ulbdHhKI34W MzeA6qnAQjv39y5XyYgjk97XAFBAbLc+WO/YlEkkmdPL/TqioibjE4n5Xn9rd3Q0UpLm JWZWCUUzp5NcrJd0sWp3qwi0+BFouwCkp8q5msnT3XvBfEZ9FfvMfugHKq6A4vgrQlVH Y0ZiiyO89V67ha3NNoWkKWEct808J3x9lZDbcbREePzA3nC2osrrMdHklr7aDBhAI2Nf +A+w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=OTaFFMYBVP+QujpvomI3smt+CnB1wh0iLnUK0PT4pEc=; fh=O4yhk4V8tvPJDnLnyAX1De4ll2cui8YfCZlHtNTUPp4=; b=bEnu79++/msQ2RPBEjiRc8ORjWB1wAtt9ylFNKadQmtB13/6R4GTpVE4LxRNdDsMjd 9Aho/8eESAktWL7M2fXWS8RJAdfHjOzrLQ68+xCx4AyF33ExtwCWap734sL6osRbwNxt CM1VwtNqQwbECofg7+Mzlkd3e+AGcJal9tD6blQYwsXVqnU1LchDrNZTPKlT/qhjM59k NKSEbOdk6aDSgLHMZItiQMEcAgnmBGAYTkErb3pLx7oQzFgMjTcbmLFlRgrBK+GBJW66 EEdOz7U1fgvWcSZe3XghtjmSgxtBQLTm82UcSCwcSnvR0SSWgFoToPaF9HqPft3nXQ0H 8d4Q==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=gbKgy8zS; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id d75a77b69052e-47ea19876eesi123338431cf.266.2025.04.28.22.02.08 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Mon, 28 Apr 2025 22:02:08 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=gbKgy8zS; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1u9d5a-0008Jk-L4; Tue, 29 Apr 2025 01:01:02 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1u9d4y-0007YP-7z for qemu-devel@nongnu.org; Tue, 29 Apr 2025 01:00:24 -0400 Received: from mail-pl1-x62d.google.com ([2607:f8b0:4864:20::62d]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1u9d4v-0005z7-Cq for qemu-devel@nongnu.org; Tue, 29 Apr 2025 01:00:23 -0400 Received: by mail-pl1-x62d.google.com with SMTP id d9443c01a7336-227914acd20so55783245ad.1 for ; Mon, 28 Apr 2025 22:00:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1745902820; x=1746507620; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=OTaFFMYBVP+QujpvomI3smt+CnB1wh0iLnUK0PT4pEc=; b=gbKgy8zStpBMUsa6qctQkH3WO9Zpv60GX62dD+TMlCmFXQToSYiS7mdUJjK9l81OCC EpRu21+CjWZC3HC3wac5ecelz/1+vWS57UW9cuvdTJbLIeHgH68W0W4KWZ9IF9Wb2r3x Wl9eEcPOkSEOR1i7KuI7+BDpF8REUycYOcXTL4dCZaxAhMVEBdZeAMPWkJ0PgS6pbbnB lZ7aLYXONyitfu1Y4fSFL8SebVmwsAeWpkvg6yoZaBTeJoC501WGZgcqoiMOzj3dqUCg o1FGGKeRRAobnIqv94B0iDrQUFSmm2rlpT4Z6aD9g4vRZxpqeAnzFk17Ltq9klMGI3z5 6r7Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1745902820; x=1746507620; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=OTaFFMYBVP+QujpvomI3smt+CnB1wh0iLnUK0PT4pEc=; b=IfjQ/0inKnXi2hYV6kDoF/a1T7qdzMkE3aZbQ/zFPRIpcfI1qIpx/UdUFZsWWv5NEP hygPwHAujiwC7F8JRlfNVpJUVdoOddpZ9AF0TtGvOfUpp6AGPPEXnqLQ6B3GrjZngvo8 dBmh3+4EYA3hDehqtbWAw312rn40fKGzIRq1KpaSRHCMWKftuLXGIn43bWnNrXeRu6Oi 5Wx2Y1VDp0Igi8tevtBt0sovhefo0EZSye6anwt/yYUPvU8kAjcD53/GB93jnKfMvb4A upSJTKgkSDmrZ2Nyu17MDXktq2vmFiJkTsn1RAceKcHmhd3mwh3GxZM1bLhXscELMItX spkA== X-Gm-Message-State: AOJu0YxB6r6fFieY+lHW8C/CPtFe90EVXW+Cakuu27Vip/7eDvYOXXlA udU3Y5+FmE58doDUJznzJIX6LXFZ9dPHVvXdP3QlqHZrstsM5oRV0DJd9KMC809HWO0pPUhLQvF s X-Gm-Gg: ASbGncuSdHZxALuOPw5Vfq69W4hwRBOxpP1XqqlH1TZDvz29L9AKfPm024v1cqRO2m7 Gc0QlL15AUE6P/2e3xA9r/KvcR/Vc1utAqW8RIw4CaFQCoH9rIOcXEU4ryawzG+KLgEQ3g5b6Yu sWY/2mF7kBC3M72jM8oETU3DQK97ToevCASo+VbfFfPEFFX6/pFzlK+2OQ5vgEYnyrSDhlBBnWc tiwzhNbcnhSrRnoiqQTy4xI7mEQz5uhkFQ/V905Lv4BrsqD2ZPJhmoMhEqANOsvN++OBBHxvmEp fuXtlVNWlmsQH612CrY+yghCxV2pFlR51wL6kdGM X-Received: by 2002:a17:902:d488:b0:215:a56f:1e50 with SMTP id d9443c01a7336-22de6bff536mr25643515ad.8.1745902819983; Mon, 28 Apr 2025 22:00:19 -0700 (PDT) Received: from pc.. ([38.41.223.211]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-22db4dbd6f7sm93004015ad.76.2025.04.28.22.00.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 28 Apr 2025 22:00:19 -0700 (PDT) From: Pierrick Bouvier To: qemu-devel@nongnu.org Cc: Peter Maydell , kvm@vger.kernel.org, alex.bennee@linaro.org, Paolo Bonzini , =?utf-8?q?Phil?= =?utf-8?q?ippe_Mathieu-Daud=C3=A9?= , qemu-arm@nongnu.org, anjo@rev.ng, richard.henderson@linaro.org, Pierrick Bouvier Subject: [PATCH 04/13] target/arm: move kvm stubs and remove CONFIG_KVM from kvm_arm.h Date: Mon, 28 Apr 2025 22:00:01 -0700 Message-ID: <20250429050010.971128-5-pierrick.bouvier@linaro.org> X-Mailer: git-send-email 2.47.2 In-Reply-To: <20250429050010.971128-1-pierrick.bouvier@linaro.org> References: <20250429050010.971128-1-pierrick.bouvier@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::62d; envelope-from=pierrick.bouvier@linaro.org; helo=mail-pl1-x62d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org We have to be careful to expose struct kvm_vcpu_init only when kvm is possible, thus the additional CONFIG_KVM_IS_POSSIBLE around kvm_arm_create_scratch_host_vcpu. Signed-off-by: Pierrick Bouvier --- target/arm/kvm_arm.h | 84 ++----------------------------------------- target/arm/kvm-stub.c | 77 +++++++++++++++++++++++++++++++++++++++ 2 files changed, 79 insertions(+), 82 deletions(-) diff --git a/target/arm/kvm_arm.h b/target/arm/kvm_arm.h index 05c3de8cd46..c8ddf8beb2e 100644 --- a/target/arm/kvm_arm.h +++ b/target/arm/kvm_arm.h @@ -94,7 +94,7 @@ void kvm_arm_cpu_post_load(ARMCPU *cpu); */ void kvm_arm_reset_vcpu(ARMCPU *cpu); -#ifdef CONFIG_KVM +#ifdef CONFIG_KVM_IS_POSSIBLE /** * kvm_arm_create_scratch_host_vcpu: * @cpus_to_try: array of QEMU_KVM_ARM_TARGET_* values (terminated with @@ -116,6 +116,7 @@ void kvm_arm_reset_vcpu(ARMCPU *cpu); bool kvm_arm_create_scratch_host_vcpu(const uint32_t *cpus_to_try, int *fdarray, struct kvm_vcpu_init *init); +#endif /* CONFIG_KVM_IS_POSSIBLE */ /** * kvm_arm_destroy_scratch_host_vcpu: @@ -221,85 +222,4 @@ int kvm_arm_set_irq(int cpu, int irqtype, int irq, int level); void kvm_arm_enable_mte(Object *cpuobj, Error **errp); -#else - -/* - * It's safe to call these functions without KVM support. - * They should either do nothing or return "not supported". - */ -static inline bool kvm_arm_aarch32_supported(void) -{ - return false; -} - -static inline bool kvm_arm_pmu_supported(void) -{ - return false; -} - -static inline bool kvm_arm_sve_supported(void) -{ - return false; -} - -static inline bool kvm_arm_mte_supported(void) -{ - return false; -} - -/* - * These functions should never actually be called without KVM support. - */ -static inline void kvm_arm_set_cpu_features_from_host(ARMCPU *cpu) -{ - g_assert_not_reached(); -} - -static inline void kvm_arm_add_vcpu_properties(ARMCPU *cpu) -{ - g_assert_not_reached(); -} - -static inline int kvm_arm_get_max_vm_ipa_size(MachineState *ms, bool *fixed_ipa) -{ - g_assert_not_reached(); -} - -static inline int kvm_arm_vgic_probe(void) -{ - g_assert_not_reached(); -} - -static inline void kvm_arm_pmu_set_irq(ARMCPU *cpu, int irq) -{ - g_assert_not_reached(); -} - -static inline void kvm_arm_pmu_init(ARMCPU *cpu) -{ - g_assert_not_reached(); -} - -static inline void kvm_arm_pvtime_init(ARMCPU *cpu, uint64_t ipa) -{ - g_assert_not_reached(); -} - -static inline void kvm_arm_steal_time_finalize(ARMCPU *cpu, Error **errp) -{ - g_assert_not_reached(); -} - -static inline uint32_t kvm_arm_sve_get_vls(ARMCPU *cpu) -{ - g_assert_not_reached(); -} - -static inline void kvm_arm_enable_mte(Object *cpuobj, Error **errp) -{ - g_assert_not_reached(); -} - -#endif - #endif diff --git a/target/arm/kvm-stub.c b/target/arm/kvm-stub.c index 965a486b320..2b73d0598c1 100644 --- a/target/arm/kvm-stub.c +++ b/target/arm/kvm-stub.c @@ -22,3 +22,80 @@ bool write_list_to_kvmstate(ARMCPU *cpu, int level) { g_assert_not_reached(); } + +/* + * It's safe to call these functions without KVM support. + * They should either do nothing or return "not supported". + */ +bool kvm_arm_aarch32_supported(void) +{ + return false; +} + +bool kvm_arm_pmu_supported(void) +{ + return false; +} + +bool kvm_arm_sve_supported(void) +{ + return false; +} + +bool kvm_arm_mte_supported(void) +{ + return false; +} + +/* + * These functions should never actually be called without KVM support. + */ +void kvm_arm_set_cpu_features_from_host(ARMCPU *cpu) +{ + g_assert_not_reached(); +} + +void kvm_arm_add_vcpu_properties(ARMCPU *cpu) +{ + g_assert_not_reached(); +} + +int kvm_arm_get_max_vm_ipa_size(MachineState *ms, bool *fixed_ipa) +{ + g_assert_not_reached(); +} + +int kvm_arm_vgic_probe(void) +{ + g_assert_not_reached(); +} + +void kvm_arm_pmu_set_irq(ARMCPU *cpu, int irq) +{ + g_assert_not_reached(); +} + +void kvm_arm_pmu_init(ARMCPU *cpu) +{ + g_assert_not_reached(); +} + +void kvm_arm_pvtime_init(ARMCPU *cpu, uint64_t ipa) +{ + g_assert_not_reached(); +} + +void kvm_arm_steal_time_finalize(ARMCPU *cpu, Error **errp) +{ + g_assert_not_reached(); +} + +uint32_t kvm_arm_sve_get_vls(ARMCPU *cpu) +{ + g_assert_not_reached(); +} + +void kvm_arm_enable_mte(Object *cpuobj, Error **errp) +{ + g_assert_not_reached(); +}