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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-ad18950830csm84058166b.124.2025.05.02.11.58.20 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 02 May 2025 11:58:21 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Laurent Vivier , Igor Mammedov , Huacai Chen , Amit Shah , Marcel Apfelbaum , Sergio Lopez , Ani Sinha , Paolo Bonzini , Eduardo Habkost , Jiaxun Yang , Jason Wang , Richard Henderson , Yanan Wang , Gerd Hoffmann , =?utf-8?q?Cl=C3=A9ment_Mathieu--Drif?= , Zhao Liu , =?utf-8?q?Marc-Andr=C3=A9_Lureau?= , Yi Liu , "Michael S. Tsirkin" , Mark Cave-Ayland Subject: [PATCH v3 15/19] hw/i386/intel_iommu: Remove IntelIOMMUState::buggy_eim field Date: Fri, 2 May 2025 20:56:47 +0200 Message-ID: <20250502185652.67370-16-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250502185652.67370-1-philmd@linaro.org> References: <20250502185652.67370-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::62e; envelope-from=philmd@linaro.org; helo=mail-ej1-x62e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org The IntelIOMMUState::buggy_eim boolean was only set in the hw_compat_2_7[] array, via the 'x-buggy-eim=true' property. We removed all machines using that array, lets remove that property, simplifying vtd_decide_config(). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Mark Cave-Ayland --- include/hw/i386/intel_iommu.h | 1 - hw/i386/intel_iommu.c | 5 ++--- 2 files changed, 2 insertions(+), 4 deletions(-) diff --git a/include/hw/i386/intel_iommu.h b/include/hw/i386/intel_iommu.h index e95477e8554..29304329d05 100644 --- a/include/hw/i386/intel_iommu.h +++ b/include/hw/i386/intel_iommu.h @@ -303,7 +303,6 @@ struct IntelIOMMUState { uint32_t intr_size; /* Number of IR table entries */ bool intr_eime; /* Extended interrupt mode enabled */ OnOffAuto intr_eim; /* Toggle for EIM cabability */ - bool buggy_eim; /* Force buggy EIM unless eim=off */ uint8_t aw_bits; /* Host/IOVA address width (in bits) */ bool dma_drain; /* Whether DMA r/w draining enabled */ bool dma_translation; /* Whether DMA translation supported */ diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index 5f8ed1243d1..c980cecb4ee 100644 --- a/hw/i386/intel_iommu.c +++ b/hw/i386/intel_iommu.c @@ -3823,7 +3823,6 @@ static const Property vtd_properties[] = { DEFINE_PROP_UINT32("version", IntelIOMMUState, version, 0), DEFINE_PROP_ON_OFF_AUTO("eim", IntelIOMMUState, intr_eim, ON_OFF_AUTO_AUTO), - DEFINE_PROP_BOOL("x-buggy-eim", IntelIOMMUState, buggy_eim, false), DEFINE_PROP_UINT8("aw-bits", IntelIOMMUState, aw_bits, VTD_HOST_ADDRESS_WIDTH), DEFINE_PROP_BOOL("caching-mode", IntelIOMMUState, caching_mode, FALSE), @@ -4731,11 +4730,11 @@ static bool vtd_decide_config(IntelIOMMUState *s, Error **errp) } if (s->intr_eim == ON_OFF_AUTO_AUTO) { - s->intr_eim = (kvm_irqchip_in_kernel() || s->buggy_eim) + s->intr_eim = kvm_irqchip_in_kernel() && x86_iommu_ir_supported(x86_iommu) ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF; } - if (s->intr_eim == ON_OFF_AUTO_ON && !s->buggy_eim) { + if (s->intr_eim == ON_OFF_AUTO_ON) { if (kvm_irqchip_is_split() && !kvm_enable_x2apic()) { error_setg(errp, "eim=on requires support on the KVM side" "(X2APIC_API, first shipped in v4.7)");