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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-ad1895094basm85876966b.145.2025.05.02.11.57.28 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 02 May 2025 11:57:29 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Laurent Vivier , Igor Mammedov , Huacai Chen , Amit Shah , Marcel Apfelbaum , Sergio Lopez , Ani Sinha , Paolo Bonzini , Eduardo Habkost , Jiaxun Yang , Jason Wang , Richard Henderson , Yanan Wang , Gerd Hoffmann , =?utf-8?q?Cl=C3=A9ment_Mathieu--Drif?= , Zhao Liu , =?utf-8?q?Marc-Andr=C3=A9_Lureau?= , Yi Liu , "Michael S. Tsirkin" Subject: [PATCH v3 06/19] hw/nvram/fw_cfg: Remove fw_cfg_io_properties::dma_enabled Date: Fri, 2 May 2025 20:56:38 +0200 Message-ID: <20250502185652.67370-7-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250502185652.67370-1-philmd@linaro.org> References: <20250502185652.67370-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::633; envelope-from=philmd@linaro.org; helo=mail-ej1-x633.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Now than all calls to fw_cfg_init_io_dma() pass DMA arguments, the 'dma_enabled' of the TYPE_FW_CFG_IO type is not used anymore. Remove it, simplifying fw_cfg_init_io_dma() and fw_cfg_io_realize(). Note, we can not remove the equivalent in fw_cfg_mem_properties[] because it is still used in HPPA and MIPS Loongson3 machines: $ git grep -w fw_cfg_init_mem hw/hppa/machine.c:204: fw_cfg = fw_cfg_init_mem(addr, addr + 4); hw/mips/loongson3_virt.c:289: fw_cfg = fw_cfg_init_mem(cfg_addr, cfg_addr + 8, 8); Signed-off-by: Philippe Mathieu-Daudé --- hw/nvram/fw_cfg.c | 26 ++++++++------------------ 1 file changed, 8 insertions(+), 18 deletions(-) diff --git a/hw/nvram/fw_cfg.c b/hw/nvram/fw_cfg.c index d119c10d308..c1bd229e8f3 100644 --- a/hw/nvram/fw_cfg.c +++ b/hw/nvram/fw_cfg.c @@ -1026,12 +1026,9 @@ FWCfgState *fw_cfg_init_io_dma(uint32_t iobase, uint32_t dma_iobase, FWCfgIoState *ios; FWCfgState *s; MemoryRegion *iomem = get_system_io(); - bool dma_requested = dma_iobase && dma_as; + assert(dma_iobase && dma_as); dev = qdev_new(TYPE_FW_CFG_IO); - if (!dma_requested) { - qdev_prop_set_bit(dev, "dma_enabled", false); - } object_property_add_child(OBJECT(qdev_get_machine()), TYPE_FW_CFG, OBJECT(dev)); @@ -1042,13 +1039,10 @@ FWCfgState *fw_cfg_init_io_dma(uint32_t iobase, uint32_t dma_iobase, memory_region_add_subregion(iomem, iobase, &ios->comb_iomem); s = FW_CFG(dev); - - if (s->dma_enabled) { - /* 64 bits for the address field */ - s->dma_as = dma_as; - s->dma_addr = 0; - memory_region_add_subregion(iomem, dma_iobase, &s->dma_iomem); - } + /* 64 bits for the address field */ + s->dma_as = dma_as; + s->dma_addr = 0; + memory_region_add_subregion(iomem, dma_iobase, &s->dma_iomem); return s; } @@ -1185,8 +1179,6 @@ static void fw_cfg_file_slots_allocate(FWCfgState *s, Error **errp) } static const Property fw_cfg_io_properties[] = { - DEFINE_PROP_BOOL("dma_enabled", FWCfgIoState, parent_obj.dma_enabled, - true), DEFINE_PROP_UINT16("x-file-slots", FWCfgIoState, parent_obj.file_slots, FW_CFG_FILE_SLOTS_DFLT), }; @@ -1207,11 +1199,9 @@ static void fw_cfg_io_realize(DeviceState *dev, Error **errp) memory_region_init_io(&s->comb_iomem, OBJECT(s), &fw_cfg_comb_mem_ops, FW_CFG(s), "fwcfg", FW_CFG_CTL_SIZE); - if (FW_CFG(s)->dma_enabled) { - memory_region_init_io(&FW_CFG(s)->dma_iomem, OBJECT(s), - &fw_cfg_dma_mem_ops, FW_CFG(s), "fwcfg.dma", - sizeof(dma_addr_t)); - } + memory_region_init_io(&FW_CFG(s)->dma_iomem, OBJECT(s), + &fw_cfg_dma_mem_ops, FW_CFG(s), "fwcfg.dma", + sizeof(dma_addr_t)); fw_cfg_common_realize(dev, errp); }