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([38.41.223.211]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-740590207e3sm4400511b3a.94.2025.05.03.22.29.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 03 May 2025 22:29:32 -0700 (PDT) From: Pierrick Bouvier To: qemu-devel@nongnu.org Cc: Paolo Bonzini , qemu-arm@nongnu.org, anjo@rev.ng, kvm@vger.kernel.org, richard.henderson@linaro.org, Peter Maydell , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , alex.bennee@linaro.org, Pierrick Bouvier Subject: [PATCH v4 14/40] tcg: add vaddr type for helpers Date: Sat, 3 May 2025 22:28:48 -0700 Message-ID: <20250504052914.3525365-15-pierrick.bouvier@linaro.org> X-Mailer: git-send-email 2.47.2 In-Reply-To: <20250504052914.3525365-1-pierrick.bouvier@linaro.org> References: <20250504052914.3525365-1-pierrick.bouvier@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::42e; envelope-from=pierrick.bouvier@linaro.org; helo=mail-pf1-x42e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Defined as an alias of i32/i64 depending on host pointer size. Signed-off-by: Pierrick Bouvier --- include/tcg/tcg-op-common.h | 1 + include/tcg/tcg.h | 17 +++++++++++++++++ include/exec/helper-head.h.inc | 11 +++++++++++ tcg/tcg.c | 6 ++++++ 4 files changed, 35 insertions(+) diff --git a/include/tcg/tcg-op-common.h b/include/tcg/tcg-op-common.h index b439bdb385a..7d7375eef44 100644 --- a/include/tcg/tcg-op-common.h +++ b/include/tcg/tcg-op-common.h @@ -14,6 +14,7 @@ TCGv_i32 tcg_constant_i32(int32_t val); TCGv_i64 tcg_constant_i64(int64_t val); +TCGv_vaddr tcg_constant_vaddr(vaddr val); TCGv_vec tcg_constant_vec(TCGType type, unsigned vece, int64_t val); TCGv_vec tcg_constant_vec_matching(TCGv_vec match, unsigned vece, int64_t val); diff --git a/include/tcg/tcg.h b/include/tcg/tcg.h index aa300a2f8ba..0eb033aa7d1 100644 --- a/include/tcg/tcg.h +++ b/include/tcg/tcg.h @@ -188,6 +188,7 @@ typedef tcg_target_ulong TCGArg; * TCGv_i64 : 64 bit integer type * TCGv_i128 : 128 bit integer type * TCGv_ptr : a host pointer type + * TCGv_vaddr: an integer type large enough to hold a target pointer type * TCGv_vec : a host vector type; the exact size is not exposed to the CPU front-end code. * TCGv : an integer type the same size as target_ulong @@ -214,6 +215,7 @@ typedef struct TCGv_i64_d *TCGv_i64; typedef struct TCGv_i128_d *TCGv_i128; typedef struct TCGv_ptr_d *TCGv_ptr; typedef struct TCGv_vec_d *TCGv_vec; +typedef struct TCGv_vaddr_d *TCGv_vaddr; typedef TCGv_ptr TCGv_env; /* call flags */ @@ -526,6 +528,11 @@ static inline TCGTemp *tcgv_ptr_temp(TCGv_ptr v) return tcgv_i32_temp((TCGv_i32)v); } +static inline TCGTemp *tcgv_vaddr_temp(TCGv_vaddr v) +{ + return tcgv_i32_temp((TCGv_i32)v); +} + static inline TCGTemp *tcgv_vec_temp(TCGv_vec v) { return tcgv_i32_temp((TCGv_i32)v); @@ -551,6 +558,11 @@ static inline TCGArg tcgv_ptr_arg(TCGv_ptr v) return temp_arg(tcgv_ptr_temp(v)); } +static inline TCGArg tcgv_vaddr_arg(TCGv_vaddr v) +{ + return temp_arg(tcgv_vaddr_temp(v)); +} + static inline TCGArg tcgv_vec_arg(TCGv_vec v) { return temp_arg(tcgv_vec_temp(v)); @@ -572,6 +584,11 @@ static inline TCGv_i128 temp_tcgv_i128(TCGTemp *t) return (TCGv_i128)temp_tcgv_i32(t); } +static inline TCGv_vaddr temp_tcgv_vaddr(TCGTemp *t) +{ + return (TCGv_vaddr)temp_tcgv_i32(t); +} + static inline TCGv_ptr temp_tcgv_ptr(TCGTemp *t) { return (TCGv_ptr)temp_tcgv_i32(t); diff --git a/include/exec/helper-head.h.inc b/include/exec/helper-head.h.inc index bce5db06ef3..b15256ce14d 100644 --- a/include/exec/helper-head.h.inc +++ b/include/exec/helper-head.h.inc @@ -21,6 +21,7 @@ #define dh_alias_f32 i32 #define dh_alias_f64 i64 #define dh_alias_ptr ptr +#define dh_alias_vaddr vaddr #define dh_alias_cptr ptr #define dh_alias_env ptr #define dh_alias_fpst ptr @@ -37,6 +38,7 @@ #define dh_ctype_f16 uint32_t #define dh_ctype_f32 float32 #define dh_ctype_f64 float64 +#define dh_ctype_vaddr uintptr_t #define dh_ctype_ptr void * #define dh_ctype_cptr const void * #define dh_ctype_env CPUArchState * @@ -91,6 +93,15 @@ #define dh_typecode_i64 4 #define dh_typecode_s64 5 #define dh_typecode_ptr 6 + +#if __SIZEOF_POINTER__ == 4 +# define dh_typecode_vaddr dh_typecode_i32 +#elif __SIZEOF_POINTER__ == 8 +# define dh_typecode_vaddr dh_typecode_i64 +#else +# error "sizeof pointer is different from {4,8}" +#endif + #define dh_typecode_i128 7 #define dh_typecode_int dh_typecode_s32 #define dh_typecode_f16 dh_typecode_i32 diff --git a/tcg/tcg.c b/tcg/tcg.c index c4e866e9c34..e86576120c0 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -2368,6 +2368,12 @@ TCGv_i64 tcg_constant_i64(int64_t val) return temp_tcgv_i64(tcg_constant_internal(TCG_TYPE_I64, val)); } +TCGv_vaddr tcg_constant_vaddr(vaddr val) +{ + TCGType type = __SIZEOF_POINTER__ == 8 ? TCG_TYPE_I64 : TCG_TYPE_I32; + return temp_tcgv_vaddr(tcg_constant_internal(type, val)); +} + TCGv_ptr tcg_constant_ptr_int(intptr_t val) { return temp_tcgv_ptr(tcg_constant_internal(TCG_TYPE_PTR, val));