diff mbox series

[11/12] target/sparc: Fill in TCGCPUOps.pointer_wrap

Message ID 20250504205714.3432096-12-richard.henderson@linaro.org
State New
Headers show
Series accel/tcg: Fix cross-page pointer wrapping issue | expand

Commit Message

Richard Henderson May 4, 2025, 8:57 p.m. UTC
Check address masking state for sparc64.

Cc: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/sparc/cpu.c | 13 +++++++++++++
 1 file changed, 13 insertions(+)

Comments

Philippe Mathieu-Daudé May 5, 2025, 2:54 p.m. UTC | #1
On 4/5/25 22:57, Richard Henderson wrote:
> Check address masking state for sparc64.
> 
> Cc: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
>   target/sparc/cpu.c | 13 +++++++++++++
>   1 file changed, 13 insertions(+)
> 
> diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c
> index 2a3e408923..ed7701b02f 100644
> --- a/target/sparc/cpu.c
> +++ b/target/sparc/cpu.c
> @@ -1002,6 +1002,18 @@ static const struct SysemuCPUOps sparc_sysemu_ops = {
>   #ifdef CONFIG_TCG
>   #include "accel/tcg/cpu-ops.h"
>   
> +#ifndef CONFIG_USER_ONLY
> +static vaddr sparc_pointer_wrap(CPUState *cs, int mmu_idx,
> +                                vaddr result, vaddr base)
> +{
> +#ifdef TARGET_SPARC64
> +    return cpu_env(cs)->pstate & PS_AM ? (uint32_t)result : result;
> +#else
> +    return (uint32_t)result;

Alternatively expose AM_CHECK()?

Regardless,
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>

> +#endif
> +}
> +#endif
Richard Henderson May 5, 2025, 4:16 p.m. UTC | #2
On 5/5/25 07:54, Philippe Mathieu-Daudé wrote:
> On 4/5/25 22:57, Richard Henderson wrote:
>> Check address masking state for sparc64.
>>
>> Cc: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
>> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
>> ---
>>   target/sparc/cpu.c | 13 +++++++++++++
>>   1 file changed, 13 insertions(+)
>>
>> diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c
>> index 2a3e408923..ed7701b02f 100644
>> --- a/target/sparc/cpu.c
>> +++ b/target/sparc/cpu.c
>> @@ -1002,6 +1002,18 @@ static const struct SysemuCPUOps sparc_sysemu_ops = {
>>   #ifdef CONFIG_TCG
>>   #include "accel/tcg/cpu-ops.h"
>> +#ifndef CONFIG_USER_ONLY
>> +static vaddr sparc_pointer_wrap(CPUState *cs, int mmu_idx,
>> +                                vaddr result, vaddr base)
>> +{
>> +#ifdef TARGET_SPARC64
>> +    return cpu_env(cs)->pstate & PS_AM ? (uint32_t)result : result;
>> +#else
>> +    return (uint32_t)result;
> 
> Alternatively expose AM_CHECK()?

No, AM_CHECK uses DisasContext.


r~
diff mbox series

Patch

diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c
index 2a3e408923..ed7701b02f 100644
--- a/target/sparc/cpu.c
+++ b/target/sparc/cpu.c
@@ -1002,6 +1002,18 @@  static const struct SysemuCPUOps sparc_sysemu_ops = {
 #ifdef CONFIG_TCG
 #include "accel/tcg/cpu-ops.h"
 
+#ifndef CONFIG_USER_ONLY
+static vaddr sparc_pointer_wrap(CPUState *cs, int mmu_idx,
+                                vaddr result, vaddr base)
+{
+#ifdef TARGET_SPARC64
+    return cpu_env(cs)->pstate & PS_AM ? (uint32_t)result : result;
+#else
+    return (uint32_t)result;
+#endif
+}
+#endif
+
 static const TCGCPUOps sparc_tcg_ops = {
     /*
      * From Oracle SPARC Architecture 2015:
@@ -1036,6 +1048,7 @@  static const TCGCPUOps sparc_tcg_ops = {
 
 #ifndef CONFIG_USER_ONLY
     .tlb_fill = sparc_cpu_tlb_fill,
+    .pointer_wrap = sparc_pointer_wrap,
     .cpu_exec_interrupt = sparc_cpu_exec_interrupt,
     .cpu_exec_halt = sparc_cpu_has_work,
     .cpu_exec_reset = cpu_reset,