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[71.212.47.143]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7405902154dsm12255251b3a.90.2025.05.07.14.13.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 07 May 2025 14:13:22 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: laurent@vivier.eu, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v5 24/24] target/m68k: Implement FPIAR Date: Wed, 7 May 2025 14:12:59 -0700 Message-ID: <20250507211300.9735-25-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250507211300.9735-1-richard.henderson@linaro.org> References: <20250507211300.9735-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::435; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x435.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org So far, this is only read-as-written. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2497 Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- target/m68k/cpu.h | 1 + target/m68k/cpu.c | 23 ++++++++++++++++++++++- target/m68k/helper.c | 14 ++++++++------ target/m68k/translate.c | 3 ++- 4 files changed, 33 insertions(+), 8 deletions(-) diff --git a/target/m68k/cpu.h b/target/m68k/cpu.h index 8c23d772e4..1b0bb17905 100644 --- a/target/m68k/cpu.h +++ b/target/m68k/cpu.h @@ -110,6 +110,7 @@ typedef struct CPUArchState { uint32_t fpsr; bool fpsr_inex1; /* live only with an in-flight decimal operand */ float_status fp_status; + uint32_t fpiar; uint64_t mactmp; /* diff --git a/target/m68k/cpu.c b/target/m68k/cpu.c index fe53572542..00cba4d963 100644 --- a/target/m68k/cpu.c +++ b/target/m68k/cpu.c @@ -470,6 +470,23 @@ static const VMStateDescription vmstate_freg = { } }; +static bool fpu_fpiar_needed(void *opaque) +{ + M68kCPU *s = opaque; + return s->env.fpiar != 0; +} + +static const VMStateDescription vmstate_fpiar = { + .name = "cpu/fpu/fpiar", + .version_id = 1, + .minimum_version_id = 1, + .needed = fpu_fpiar_needed, + .fields = (const VMStateField[]) { + VMSTATE_UINT32(env.fpiar, M68kCPU), + VMSTATE_END_OF_LIST() + } +}; + static int fpu_post_load(void *opaque, int version) { M68kCPU *s = opaque; @@ -490,7 +507,11 @@ static const VMStateDescription vmstate_fpu = { VMSTATE_STRUCT_ARRAY(env.fregs, M68kCPU, 8, 0, vmstate_freg, FPReg), VMSTATE_STRUCT(env.fp_result, M68kCPU, 0, vmstate_freg, FPReg), VMSTATE_END_OF_LIST() - } + }, + .subsections = (const VMStateDescription * const []) { + &vmstate_fpiar, + NULL + }, }; static bool cf_spregs_needed(void *opaque) diff --git a/target/m68k/helper.c b/target/m68k/helper.c index b50ef6dec3..818c0dd057 100644 --- a/target/m68k/helper.c +++ b/target/m68k/helper.c @@ -47,8 +47,8 @@ static int cf_fpu_gdb_get_reg(CPUState *cs, GByteArray *mem_buf, int n) return gdb_get_reg32(mem_buf, env->fpcr); case 9: /* fpstatus */ return gdb_get_reg32(mem_buf, env->fpsr); - case 10: /* fpiar, not implemented */ - return gdb_get_reg32(mem_buf, 0); + case 10: /* fpiar */ + return gdb_get_reg32(mem_buf, env->fpiar); } return 0; } @@ -71,7 +71,8 @@ static int cf_fpu_gdb_set_reg(CPUState *cs, uint8_t *mem_buf, int n) case 9: /* fpstatus */ env->fpsr = ldl_be_p(mem_buf); return 4; - case 10: /* fpiar, not implemented */ + case 10: /* fpiar */ + env->fpiar = ldl_be_p(mem_buf); return 4; } return 0; @@ -93,8 +94,8 @@ static int m68k_fpu_gdb_get_reg(CPUState *cs, GByteArray *mem_buf, int n) return gdb_get_reg32(mem_buf, env->fpcr); case 9: /* fpstatus */ return gdb_get_reg32(mem_buf, env->fpsr); - case 10: /* fpiar, not implemented */ - return gdb_get_reg32(mem_buf, 0); + case 10: /* fpiar */ + return gdb_get_reg32(mem_buf, env->fpiar); } return 0; } @@ -116,7 +117,8 @@ static int m68k_fpu_gdb_set_reg(CPUState *cs, uint8_t *mem_buf, int n) case 9: /* fpstatus */ env->fpsr = ldl_be_p(mem_buf); return 4; - case 10: /* fpiar, not implemented */ + case 10: /* fpiar */ + env->fpiar = ldl_be_p(mem_buf); return 4; } return 0; diff --git a/target/m68k/translate.c b/target/m68k/translate.c index 44c1b3c0cf..aa60480f95 100644 --- a/target/m68k/translate.c +++ b/target/m68k/translate.c @@ -4674,7 +4674,7 @@ static void gen_load_fcr(DisasContext *s, TCGv res, int reg) { switch (reg) { case M68K_FPIAR: - tcg_gen_movi_i32(res, 0); + tcg_gen_ld_i32(res, tcg_env, offsetof(CPUM68KState, fpiar)); break; case M68K_FPSR: tcg_gen_ld_i32(res, tcg_env, offsetof(CPUM68KState, fpsr)); @@ -4689,6 +4689,7 @@ static void gen_store_fcr(DisasContext *s, TCGv val, int reg) { switch (reg) { case M68K_FPIAR: + tcg_gen_st_i32(val, tcg_env, offsetof(CPUM68KState, fpiar)); break; case M68K_FPSR: tcg_gen_st_i32(val, tcg_env, offsetof(CPUM68KState, fpsr));