diff mbox series

[08/13] qemu/target-info: implement missing helpers

Message ID 20250507231442.879619-9-pierrick.bouvier@linaro.org
State New
Headers show
Series single-binary: make QAPI generated files common | expand

Commit Message

Pierrick Bouvier May 7, 2025, 11:14 p.m. UTC
Add runtime helpers for target and config queries.

Note: This will be reimplemented later [1] using proper information in
TargetInfo. Meanwhile, just add a simple implementation.

[1] https://patchew.org/QEMU/20250424222112.36194-1-philmd@linaro.org/20250424222112.36194-19-philmd@linaro.org/

Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
---
 meson.build                |   2 +-
 include/qemu/target-info.h |  14 +++++
 target-info.c              | 117 +++++++++++++++++++++++++++++++++++++
 3 files changed, 132 insertions(+), 1 deletion(-)

Comments

Philippe Mathieu-Daudé May 8, 2025, 6:40 a.m. UTC | #1
On 8/5/25 01:14, Pierrick Bouvier wrote:
> Add runtime helpers for target and config queries.
> 
> Note: This will be reimplemented later [1] using proper information in
> TargetInfo. Meanwhile, just add a simple implementation.
> 
> [1] https://patchew.org/QEMU/20250424222112.36194-1-philmd@linaro.org/20250424222112.36194-19-philmd@linaro.org/
> 
> Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
> ---
>   meson.build                |   2 +-
>   include/qemu/target-info.h |  14 +++++
>   target-info.c              | 117 +++++++++++++++++++++++++++++++++++++
>   3 files changed, 132 insertions(+), 1 deletion(-)


> +bool target_mips(void)

I know this is the same lowercase name, but maybe we could consider
directly using target_mips32() instead of keeping the technical debt
of having TARGET_MIPS defined for both 32 and 64-bit targets.
Thankfully we cleared that with recent targets (i.e. LoongArch or
RISC-V -- AVR is a bit different, since 8-bit AVR and AVR32 are
distinct architectures).

For x86 we often use 'x86' as any of (i386, x86_64, amd64), maybe
we can introduce target_x86() too.

> +{
> +#ifdef TARGET_MIPS
> +    return true;
> +#else
> +    return false;
> +#endif
> +}
> +
> +bool target_mips64(void)
> +{
> +#ifdef TARGET_MIPS64
> +    return true;
> +#else
> +    return false;
> +#endif
> +}
> +
> +bool target_loongarch64(void)
> +{
> +#ifdef TARGET_LOONGARCH64
> +    return true;
> +#else
> +    return false;
> +#endif
> +}
> +
> +bool target_riscv32(void)
> +{
> +#ifdef TARGET_RISCV32
> +    return true;
> +#else
> +    return false;
> +#endif
> +}
> +
> +bool target_riscv64(void)
> +{
> +#ifdef TARGET_RISCV64
> +    return true;
> +#else
> +    return false;
> +#endif
> +}
> +
> +bool target_ppc(void)

Ditto, target_ppc32()?

> +{
> +#ifdef TARGET_PPC
> +    return true;
> +#else
> +    return false;
> +#endif
> +}
> +
> +bool target_ppc64(void)
> +{
> +#ifdef TARGET_ppc64
> +    return true;
> +#else
> +    return false;
> +#endif
> +}
> +
> +bool target_has_kvm(void)
> +{
> +#ifdef CONFIG_KVM
> +    return true;
> +#else
> +    return false;
> +#endif
> +}
diff mbox series

Patch

diff --git a/meson.build b/meson.build
index 6b235b291dc..7094832c3e2 100644
--- a/meson.build
+++ b/meson.build
@@ -3822,7 +3822,7 @@  endif
 common_ss.add(pagevary)
 specific_ss.add(files('page-target.c', 'page-vary-target.c'))
 
-common_ss.add(files('target-info.c'))
+specific_ss.add(files('target-info.c'))
 specific_ss.add(files('target-info-stub.c'))
 
 subdir('backends')
diff --git a/include/qemu/target-info.h b/include/qemu/target-info.h
index 850a2958b9c..d9c0df10c53 100644
--- a/include/qemu/target-info.h
+++ b/include/qemu/target-info.h
@@ -38,4 +38,18 @@  const char *target_machine_typename(void);
  */
 const char *target_cpu_type(void);
 
+bool target_i386(void);
+bool target_x86_64(void);
+bool target_arm(void);
+bool target_aarch64(void);
+bool target_s390x(void);
+bool target_mips(void);
+bool target_mips64(void);
+bool target_loongarch64(void);
+bool target_riscv32(void);
+bool target_riscv64(void);
+bool target_ppc(void);
+bool target_ppc64(void);
+bool target_has_kvm(void);
+
 #endif
diff --git a/target-info.c b/target-info.c
index 16fdca7aaaf..f2bdae18f4f 100644
--- a/target-info.c
+++ b/target-info.c
@@ -29,3 +29,120 @@  const char *target_machine_typename(void)
 {
     return target_info()->machine_typename;
 }
+
+bool target_i386(void)
+{
+#ifdef TARGET_I386
+    return true;
+#else
+    return false;
+#endif
+}
+
+bool target_x86_64(void)
+{
+#ifdef TARGET_X86_64
+    return true;
+#else
+    return false;
+#endif
+}
+
+bool target_arm(void)
+{
+#ifdef TARGET_ARM
+    return true;
+#else
+    return false;
+#endif
+}
+
+bool target_aarch64(void)
+{
+#ifdef TARGET_AARCH64
+    return true;
+#else
+    return false;
+#endif
+}
+
+bool target_s390x(void)
+{
+#ifdef TARGET_S390X
+    return true;
+#else
+    return false;
+#endif
+}
+
+bool target_mips(void)
+{
+#ifdef TARGET_MIPS
+    return true;
+#else
+    return false;
+#endif
+}
+
+bool target_mips64(void)
+{
+#ifdef TARGET_MIPS64
+    return true;
+#else
+    return false;
+#endif
+}
+
+bool target_loongarch64(void)
+{
+#ifdef TARGET_LOONGARCH64
+    return true;
+#else
+    return false;
+#endif
+}
+
+bool target_riscv32(void)
+{
+#ifdef TARGET_RISCV32
+    return true;
+#else
+    return false;
+#endif
+}
+
+bool target_riscv64(void)
+{
+#ifdef TARGET_RISCV64
+    return true;
+#else
+    return false;
+#endif
+}
+
+bool target_ppc(void)
+{
+#ifdef TARGET_PPC
+    return true;
+#else
+    return false;
+#endif
+}
+
+bool target_ppc64(void)
+{
+#ifdef TARGET_ppc64
+    return true;
+#else
+    return false;
+#endif
+}
+
+bool target_has_kvm(void)
+{
+#ifdef CONFIG_KVM
+    return true;
+#else
+    return false;
+#endif
+}