From patchwork Wed May 7 23:41:55 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pierrick Bouvier X-Patchwork-Id: 888180 Delivered-To: patch@linaro.org Received: by 2002:a5d:4683:0:b0:38f:210b:807b with SMTP id u3csp634626wrq; Wed, 7 May 2025 16:52:53 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCUGOqSoBqqXX9+7Q/rbmV24Ju6nMYQdZ+jS5xQrnqzB+uom86Xe5VQXEAFR8zI2EF6FcKBmWg==@linaro.org X-Google-Smtp-Source: AGHT+IH8fTbkBLk9ztDYfXQ53mAS87BTfuXhVUDa2ReiIM+uIIWx5qfSm/KXSTcKGTZsof/1RPnS X-Received: by 2002:ac8:7d8a:0:b0:48c:c121:7e27 with SMTP id d75a77b69052e-49227f480d5mr79294971cf.50.1746661973490; Wed, 07 May 2025 16:52:53 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1746661973; cv=none; d=google.com; s=arc-20240605; b=dG5Tp6csgGsD803y4LOGan6IhdJTebN9hPLVKnEJTwaE1DCCKi0I3q7wYY0ZQTtO7S SPbNNn/JV5ACk06ocUX7dS44t7fueu3M62ra92Tw74VJWjlmQm/73eYZ8sJxFDCWyi/I ieLgUD4EipBGU0DubJoVZFQPsTnc5qGkQ9ABvLyefhZ9/6HF23+iGyZ6dkdYiWXA/RyC +8+/XzU3BESK0e8OfgWoL4yUa9XT5PsuZ0EGV2ahny9hK4bLlHtx0gThxn+wJ4L9gt9t AELMFfvBIwdSdEToUOIej8gQgwaRsVpgJGlvt0fEP4vhE+8XYnScRgtYNKWKgJiGyjAl /k+g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=8AlvH8T2wxvPoUN2cgh0nAAaoM8ETcHqqaWl8h2qra8=; fh=Zbxy5TRiDd+Eff0zsN+2XmZYe/TihsWpxb97dHV4h78=; b=h7e69gmjmwA1QGldZvA/3P2A7evN+f5nGDyVym3NDT0h+SVLuQCLumO4At+IVfXmya Ebv3S7LuGy9wakL+GoeVpW71LIOQhZBaumhoruf+8tzziQ9NReSQnPyc+ILyc43S/JN6 MYo5br3HbuIGmvpqXUws3kr5p4viXxA8g6Oktb+D2SgkqnbPBid1VK997a1NX4kqVmvR DRAWcB+4I/wGWH86r+Ys72pcD6+sVC+CRC1N8v0bDVjZBzY+EMbo/DheX6c+opoAGcW+ RZ4dkyvgR3niZezrjCoEw8d7euItzlDfmMQfsGHHO7vE8umcJnn6IVeZBQsUI30YIs87 RU1g==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="LOtwm4/R"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id d75a77b69052e-49223927dd9si32935301cf.609.2025.05.07.16.52.53 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Wed, 07 May 2025 16:52:53 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="LOtwm4/R"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1uCoPt-0000Ad-Vs; Wed, 07 May 2025 19:43:10 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1uCoPa-00083k-Rv for qemu-devel@nongnu.org; Wed, 07 May 2025 19:42:50 -0400 Received: from mail-pl1-x630.google.com ([2607:f8b0:4864:20::630]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1uCoPY-0002QY-7v for qemu-devel@nongnu.org; Wed, 07 May 2025 19:42:50 -0400 Received: by mail-pl1-x630.google.com with SMTP id d9443c01a7336-22e70a9c6bdso7568365ad.3 for ; Wed, 07 May 2025 16:42:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1746661367; x=1747266167; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=8AlvH8T2wxvPoUN2cgh0nAAaoM8ETcHqqaWl8h2qra8=; b=LOtwm4/R+Z+szS72BGvA0Fc/Tjm7lu1XNrzui9dyZNU+iQdsxXbSNeLJ4LJJ+WQxYj daRo8s4C/wTuFLKG2JnETW2sX9Re1CAGf5D6Yq4kVDFlLFJMhvLBs4mBgwcceCP//v0J cxxBkI4AuQV1DZJaDiGJMvhmWaBLeCP8+/roLzgoWqHjOxdaLUFGC0j/XPFwq89RDsmY plBP0zzTnmjA2FHmsHX1JPSu/vbKosEqPXyQM88Txa4I7g1upUHBRfL+iBDDLkIj33he aX6nTh0fciFeHkyIsDbbzIDx5lDftkHjJ3PXZb00k+mKFY3tuADo0qthcoN89sP4ZVrE ximg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1746661367; x=1747266167; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=8AlvH8T2wxvPoUN2cgh0nAAaoM8ETcHqqaWl8h2qra8=; b=gWhpT0L5MGxr0hzT0ULvUgSv6Mt9men9Jd5kMR8evkJf3o6qqmQ9F0yMlfjx+2r1Rp zUBkV4m4KaRF1lWSu8wk55pck9gP75ENDjgXbBQqBgKYJgICiaM8Njc/T4Ob+dzDLJBe XmzNGhIr9PIHGJilAJersZLOvlgaavzQ1IVGSSVK5ZoRIIyiHPdSGnmK8GXUfDWWwxl5 SLt9F33Op6T8h60lVkauj+4V8vM2QRz7Kjee2mmZH7hTeBM8TQ05ctT6KQfdodOP23lw 6/T71yy+sG4lm/eAD9BNoVK/+Ls+yYb+YU43gQtnxvxVeq+rO63JJ9Yy7DP2dUrUa/79 4zVA== X-Gm-Message-State: AOJu0YwkoldCzH2ge9cqf0dFQWXtLIIpt5mubqpIdNhf9KXRiZhyyOH+ oSf6qCzMKJWowwXlbwCOrbqbsv8pBQDGEWBhJ0OKb1Yt1Wlhew0Djmpyj5i6y+ww4YHqC5U0z1V o7Q9xzA== X-Gm-Gg: ASbGncsi3WtiNRo2WLF07AOZTpMEeFtgBqUAftRottB9CGLnLRU/w5tNsnB359DRKYJ +5bJB1ySRwKt9LHeS1f8oPX0a7/Cr0bEbNGmFekNHx0g1UDP+Mup4fCeZXpy8RL3jDP4fxSPM6g 9XHl3cr1qgbh60oAhpvUwRMAtDe7tD8ZhzevC87Ar9krH6Q9nzzXBhLnKbWrhTFqIeGvhTg9J6/ 1wfASQpVNNOCt2JwahdUnVPQWSaajSoebBYsna+qFjRnqpvP89ntcjlaZgRLUGsKpdghO/J9MvY nUKN0F6t0YJSRam0Hht+gGfda4FNxhdg3RTcxw6Y X-Received: by 2002:a17:902:cad3:b0:22e:7c70:ed12 with SMTP id d9443c01a7336-22e7c70ee50mr26992465ad.48.1746661366936; Wed, 07 May 2025 16:42:46 -0700 (PDT) Received: from pc.. ([38.41.223.211]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-22e815806fdsm6491325ad.17.2025.05.07.16.42.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 07 May 2025 16:42:46 -0700 (PDT) From: Pierrick Bouvier To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, anjo@rev.ng, Peter Maydell , Richard Henderson , alex.bennee@linaro.org, Paolo Bonzini , kvm@vger.kernel.org, =?utf-8?q?Philipp?= =?utf-8?q?e_Mathieu-Daud=C3=A9?= , Pierrick Bouvier Subject: [PATCH v7 04/49] target/arm: move kvm stubs and remove CONFIG_KVM from kvm_arm.h Date: Wed, 7 May 2025 16:41:55 -0700 Message-ID: <20250507234241.957746-5-pierrick.bouvier@linaro.org> X-Mailer: git-send-email 2.47.2 In-Reply-To: <20250507234241.957746-1-pierrick.bouvier@linaro.org> References: <20250507234241.957746-1-pierrick.bouvier@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::630; envelope-from=pierrick.bouvier@linaro.org; helo=mail-pl1-x630.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Add a forward decl for struct kvm_vcpu_init to avoid pulling all kvm headers. Reviewed-by: Richard Henderson Signed-off-by: Pierrick Bouvier --- target/arm/kvm_arm.h | 83 +------------------------------------------ target/arm/kvm-stub.c | 77 +++++++++++++++++++++++++++++++++++++++ 2 files changed, 78 insertions(+), 82 deletions(-) diff --git a/target/arm/kvm_arm.h b/target/arm/kvm_arm.h index 5f17fc2f3d5..5bf5d56648f 100644 --- a/target/arm/kvm_arm.h +++ b/target/arm/kvm_arm.h @@ -94,7 +94,7 @@ void kvm_arm_cpu_post_load(ARMCPU *cpu); */ void kvm_arm_reset_vcpu(ARMCPU *cpu); -#ifdef CONFIG_KVM +struct kvm_vcpu_init; /** * kvm_arm_create_scratch_host_vcpu: * @fdarray: filled in with kvmfd, vmfd, cpufd file descriptors in that order @@ -216,85 +216,4 @@ int kvm_arm_set_irq(int cpu, int irqtype, int irq, int level); void kvm_arm_enable_mte(Object *cpuobj, Error **errp); -#else - -/* - * It's safe to call these functions without KVM support. - * They should either do nothing or return "not supported". - */ -static inline bool kvm_arm_aarch32_supported(void) -{ - return false; -} - -static inline bool kvm_arm_pmu_supported(void) -{ - return false; -} - -static inline bool kvm_arm_sve_supported(void) -{ - return false; -} - -static inline bool kvm_arm_mte_supported(void) -{ - return false; -} - -/* - * These functions should never actually be called without KVM support. - */ -static inline void kvm_arm_set_cpu_features_from_host(ARMCPU *cpu) -{ - g_assert_not_reached(); -} - -static inline void kvm_arm_add_vcpu_properties(ARMCPU *cpu) -{ - g_assert_not_reached(); -} - -static inline int kvm_arm_get_max_vm_ipa_size(MachineState *ms, bool *fixed_ipa) -{ - g_assert_not_reached(); -} - -static inline int kvm_arm_vgic_probe(void) -{ - g_assert_not_reached(); -} - -static inline void kvm_arm_pmu_set_irq(ARMCPU *cpu, int irq) -{ - g_assert_not_reached(); -} - -static inline void kvm_arm_pmu_init(ARMCPU *cpu) -{ - g_assert_not_reached(); -} - -static inline void kvm_arm_pvtime_init(ARMCPU *cpu, uint64_t ipa) -{ - g_assert_not_reached(); -} - -static inline void kvm_arm_steal_time_finalize(ARMCPU *cpu, Error **errp) -{ - g_assert_not_reached(); -} - -static inline uint32_t kvm_arm_sve_get_vls(ARMCPU *cpu) -{ - g_assert_not_reached(); -} - -static inline void kvm_arm_enable_mte(Object *cpuobj, Error **errp) -{ - g_assert_not_reached(); -} - -#endif - #endif diff --git a/target/arm/kvm-stub.c b/target/arm/kvm-stub.c index 965a486b320..2b73d0598c1 100644 --- a/target/arm/kvm-stub.c +++ b/target/arm/kvm-stub.c @@ -22,3 +22,80 @@ bool write_list_to_kvmstate(ARMCPU *cpu, int level) { g_assert_not_reached(); } + +/* + * It's safe to call these functions without KVM support. + * They should either do nothing or return "not supported". + */ +bool kvm_arm_aarch32_supported(void) +{ + return false; +} + +bool kvm_arm_pmu_supported(void) +{ + return false; +} + +bool kvm_arm_sve_supported(void) +{ + return false; +} + +bool kvm_arm_mte_supported(void) +{ + return false; +} + +/* + * These functions should never actually be called without KVM support. + */ +void kvm_arm_set_cpu_features_from_host(ARMCPU *cpu) +{ + g_assert_not_reached(); +} + +void kvm_arm_add_vcpu_properties(ARMCPU *cpu) +{ + g_assert_not_reached(); +} + +int kvm_arm_get_max_vm_ipa_size(MachineState *ms, bool *fixed_ipa) +{ + g_assert_not_reached(); +} + +int kvm_arm_vgic_probe(void) +{ + g_assert_not_reached(); +} + +void kvm_arm_pmu_set_irq(ARMCPU *cpu, int irq) +{ + g_assert_not_reached(); +} + +void kvm_arm_pmu_init(ARMCPU *cpu) +{ + g_assert_not_reached(); +} + +void kvm_arm_pvtime_init(ARMCPU *cpu, uint64_t ipa) +{ + g_assert_not_reached(); +} + +void kvm_arm_steal_time_finalize(ARMCPU *cpu, Error **errp) +{ + g_assert_not_reached(); +} + +uint32_t kvm_arm_sve_get_vls(ARMCPU *cpu) +{ + g_assert_not_reached(); +} + +void kvm_arm_enable_mte(Object *cpuobj, Error **errp) +{ + g_assert_not_reached(); +}