From patchwork Thu Jun 19 13:13:11 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 897993 Delivered-To: patch@linaro.org Received: by 2002:a5d:5f54:0:b0:3a4:ee3f:8f15 with SMTP id cm20csp817479wrb; Thu, 19 Jun 2025 06:19:24 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCUegLGtNO64yx00348vJDgRI6w6V90x6CTUkCGXhMRA4Og/tyTfUBhyZmtQkTEAPnct+edTzg==@linaro.org X-Google-Smtp-Source: AGHT+IGefodExXqbrcfbkmLauNqPxcxMQW7VUf6IFXZ3nOrI4DtMnqHn4FSKGxhgJFB3csvpA+5G X-Received: by 2002:ac8:4697:0:b0:494:ab13:6824 with SMTP id d75a77b69052e-4a7599fbd6dmr137156261cf.15.1750339164140; Thu, 19 Jun 2025 06:19:24 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1750339164; cv=none; d=google.com; s=arc-20240605; b=L2iAZl956SJ9SYA8d5JN2M4Wsj27stJ1NNcvIL8CIwlJPA3bmPJG197nLImB2c6yyR 5Wy7WTsqBrrrmO+sEjgTsPBLdhxjHirqAvHB6H3FHqXbryw8rOJ/0Tc0R9HzudFE6eQh W8b5J50gAlTz2DPD8ru2HLTvYjTtZeFywUhFxNaaLbz8Ua8c+aDf2h3C6smtubd2j+8Q 3P9gpVTXB7+LmYjXmVDpYQHd0UrmuLW+CKWsbwDfDX3GjovYw/myv71lXm5dsv5NQmJA mIGgS0IHX/4R6U6YpGw9MoJ/8f08rL31is0M6nY6pcIdg/rXF+whNHpBGdSJTjr2YddE BNaw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=FOQFF5IHVggEpZxvhH4Dg2y5NDppFE2+idPk4kXeUTw=; fh=HMBMEYbXwbwG+LSk9/wtQ+/LHaozQ4G5WTAv5SKNxMo=; b=NfZKFm6LJbpGszy+QuWab9OJLPCySC+Kshk5gnKDObSNNC2waOR07RkV8BvaBYZiaA sqNDYf/57OwMiyjpWP3WOqXdWxL4ayvAzM6EZOtg1KGJWeDamf+WGohl3AGRwLS6zvGQ zP8rSCDzbQ7IFLTvx4albXMWNZbHqQYzeTJfhj7jkqc9AagQDMHm9aFX6FyDIUbO7/xu lmW+Wa7QBMxigsVnDO2dz2RjLDCftjzc6MUVlWutlCZ6GhYaEnL1ZacrAzjEIxgu0a82 6MkF+Ln7bKY4rT87S9xwvHpao/tlEFyMBY5CAeI9yeRDbzN0oCllvgHy7prnAXI8b3Eg DqmA==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=vj1jQJkO; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id d75a77b69052e-4a7721dd7c0si8921081cf.553.2025.06.19.06.19.23 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Thu, 19 Jun 2025 06:19:24 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=vj1jQJkO; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1uSF67-0003wL-Et; Thu, 19 Jun 2025 09:14:31 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1uSF66-0003vu-96 for qemu-devel@nongnu.org; Thu, 19 Jun 2025 09:14:30 -0400 Received: from mail-wm1-x32a.google.com ([2a00:1450:4864:20::32a]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1uSF64-000413-Gy for qemu-devel@nongnu.org; Thu, 19 Jun 2025 09:14:30 -0400 Received: by mail-wm1-x32a.google.com with SMTP id 5b1f17b1804b1-45362b7adc9so1462125e9.0 for ; Thu, 19 Jun 2025 06:14:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1750338866; x=1750943666; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=FOQFF5IHVggEpZxvhH4Dg2y5NDppFE2+idPk4kXeUTw=; b=vj1jQJkOCFeAgl2LypV+qDb9Y2mHP/yuk7ThDy49ItUXew3H1PIZ/jbBPZk3Xwzo+1 j/AXQ4QoYiYJoIpE7EOf7YMYrzV62XaEVU6IGssrFae4lUNMncfjq/gsnIFYHlqxWgEV znR78veHeF3WUy5xbjzLJYthVXtyB2te8RDOIOqJX/0don+Dni+bRHjBOPgsIVHovrhU k6OQ9lzHgNLkNNV8pcEcCHD4kz7KT9W/+RT3B10h8nIqBUS8VyV+9AOJVlXJ+80SgI28 +gLlebQ7glEDQfHu6SGbaPmSllvh5RNCowHJ2sECrY9RE+9equxYQeBH4nbCoMKudhDh 05/w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1750338866; x=1750943666; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=FOQFF5IHVggEpZxvhH4Dg2y5NDppFE2+idPk4kXeUTw=; b=TIjWZ/B6u2Hcw9rYPQR3DG6vEVVSs2qjZC29uCWn3rZHhQ+S9qJ2cGIKnmz4Ioeg7l uiigastupMJD3LbDLA2x4TTrOiVTY0puJHddkcE172RzvidZNIDugKTJC2UmbGGho52g k3Trb0+BrfgYfdsA5bqTS1wU+uRFiMiWSuwVIpsbdpbOxfT1YB4TPpm92YysiI2cWJGa /rwMwUdYu7zsk20EDz79uT8sONlspq1aMfa/6voi+AT8niCwVmunROpKK8wh6s0LRMcL 7S8wrps8+T1rD2IJHjBMf+aX//qnpDLTjzxtrOkhBGNmLmeQQ4bbq2d+lokH9b/HzPSq ZPQw== X-Gm-Message-State: AOJu0Yyc+vP/Hks/vfsmzvTqnGenqKtM+yC3w+K4wQuP/0Xx6YrZWl64 yZ7M3yETQ6KGWzXkU6MRbEmdyP40wItry4ObIYtef8GD2C0Z0bV/JIRFA9qmRlsZSAZjFmmAgzn 9rMrDVmY= X-Gm-Gg: ASbGncuK8xbqjBDPvdBVPyP6+tg/Y7qDJq53JVuU+lN4Ox7ymcjzNybiPkI11QooV/a 7lN/K+DGSwnNP/Yt9J6nnfayJP9HXkRFjFsWp5pWFnlxZR+sdZaQBfzXQhlpvshcpU6WapL/mx+ ALkaK2D6Vh1NyE5uIwiN3WQx0hcp6AiBF8NpX9Bk7UA+Le9dFxm6trOVdjJp3gYpIIlquMNdBtI k/qvCa44IgKXtZJ7obK+8uxks4MRBRPEjDSQuxV/+SIyJmYMR1kS1rEC4QsD6DJUPGLViCDjoLV Df5DeNJmjENBccluD74t/fcLZqAZpkUVNwrWDlVZ7WSzl3agzMkMO02nyOofgL1X1rhinoW3pjO ySUPkMPIdyjwn7xHGFCZHwebOabBquwoVB9oy X-Received: by 2002:a05:600c:6388:b0:43d:174:2668 with SMTP id 5b1f17b1804b1-4535fd55e92mr22427315e9.0.1750338866441; Thu, 19 Jun 2025 06:14:26 -0700 (PDT) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. [88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4535e97ab95sm29168365e9.7.2025.06.19.06.14.25 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 19 Jun 2025 06:14:25 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Cameron Esfahani , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Julian Armistead , Radoslaw Biernacki , =?utf-8?q?Marc-Andr=C3=A9_Lureau?= , Phil Dennis-Jordan , =?utf-8?q?Alex_Benn=C3=A9e?= , =?utf-8?q?Daniel_P?= =?utf-8?q?=2E_Berrang=C3=A9?= , Paolo Bonzini , Peter Maydell , Leif Lindholm , Pierrick Bouvier , Richard Henderson , qemu-arm@nongnu.org, Roman Bolshakov , Alexander Graf Subject: [PATCH 12/20] accel: Keep reference to AccelOpsClass in AccelClass Date: Thu, 19 Jun 2025 15:13:11 +0200 Message-ID: <20250619131319.47301-13-philmd@linaro.org> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250619131319.47301-1-philmd@linaro.org> References: <20250619131319.47301-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32a; envelope-from=philmd@linaro.org; helo=mail-wm1-x32a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Allow dereferencing AccelOpsClass outside of accel/accel-system.c. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Alex Bennée --- include/qemu/accel.h | 3 +++ include/system/accel-ops.h | 3 ++- accel/accel-common.c | 1 + accel/accel-system.c | 3 ++- accel/tcg/tcg-accel-ops.c | 4 +++- 5 files changed, 11 insertions(+), 3 deletions(-) diff --git a/include/qemu/accel.h b/include/qemu/accel.h index fbd3d897fef..9dea3145429 100644 --- a/include/qemu/accel.h +++ b/include/qemu/accel.h @@ -37,6 +37,9 @@ typedef struct AccelClass { /*< public >*/ const char *name; + /* Cached by accel_init_ops_interfaces() when created */ + AccelOpsClass *ops; + int (*init_machine)(MachineState *ms); bool (*cpu_common_realize)(CPUState *cpu, Error **errp); void (*cpu_common_unrealize)(CPUState *cpu); diff --git a/include/system/accel-ops.h b/include/system/accel-ops.h index 4c99d25aeff..44b37592d02 100644 --- a/include/system/accel-ops.h +++ b/include/system/accel-ops.h @@ -10,6 +10,7 @@ #ifndef ACCEL_OPS_H #define ACCEL_OPS_H +#include "qemu/accel.h" #include "exec/vaddr.h" #include "qom/object.h" @@ -31,7 +32,7 @@ struct AccelOpsClass { /*< public >*/ /* initialization function called when accel is chosen */ - void (*ops_init)(AccelOpsClass *ops); + void (*ops_init)(AccelClass *ac); bool (*cpus_are_resettable)(void); void (*cpu_reset_hold)(CPUState *cpu); diff --git a/accel/accel-common.c b/accel/accel-common.c index 4894b98d64a..56d88940f92 100644 --- a/accel/accel-common.c +++ b/accel/accel-common.c @@ -10,6 +10,7 @@ #include "qemu/osdep.h" #include "qemu/accel.h" #include "qemu/target-info.h" +#include "system/accel-ops.h" #include "accel/accel-cpu.h" #include "accel-internal.h" diff --git a/accel/accel-system.c b/accel/accel-system.c index a0f562ae9ff..64bc991b1ce 100644 --- a/accel/accel-system.c +++ b/accel/accel-system.c @@ -85,8 +85,9 @@ void accel_init_ops_interfaces(AccelClass *ac) * non-NULL create_vcpu_thread operation. */ ops = ACCEL_OPS_CLASS(oc); + ac->ops = ops; if (ops->ops_init) { - ops->ops_init(ops); + ops->ops_init(ac); } cpus_register_accel(ops); } diff --git a/accel/tcg/tcg-accel-ops.c b/accel/tcg/tcg-accel-ops.c index b24d6a75625..da2e22a7dff 100644 --- a/accel/tcg/tcg-accel-ops.c +++ b/accel/tcg/tcg-accel-ops.c @@ -198,8 +198,10 @@ static inline void tcg_remove_all_breakpoints(CPUState *cpu) cpu_watchpoint_remove_all(cpu, BP_GDB); } -static void tcg_accel_ops_init(AccelOpsClass *ops) +static void tcg_accel_ops_init(AccelClass *ac) { + AccelOpsClass *ops = ac->ops; + if (qemu_tcg_mttcg_enabled()) { ops->create_vcpu_thread = mttcg_start_vcpu_thread; ops->kick_vcpu_thread = mttcg_kick_vcpu_thread;