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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3a6d117c71esm2579551f8f.61.2025.06.20.10.15.59 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 20 Jun 2025 10:16:00 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Alex_Benn=C3=A9e?= , Alexander Graf , Richard Henderson , Pierrick Bouvier , Peter Maydell , Thomas Huth , Cameron Esfahani , Julian Armistead , Paolo Bonzini , "Edgar E. Iglesias" , =?utf-8?q?Philippe_Mathieu-?= =?utf-8?q?Daud=C3=A9?= Subject: [RFC PATCH v2 28/48] accel/dummy: Factor tcg_vcpu_thread_precreate() out Date: Fri, 20 Jun 2025 19:13:21 +0200 Message-ID: <20250620171342.92678-29-philmd@linaro.org> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250620171342.92678-1-philmd@linaro.org> References: <20250620171342.92678-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::333; envelope-from=philmd@linaro.org; helo=mail-wm1-x333.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Factor tcg_vcpu_thread_precreate() out for re-use. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- accel/tcg/tcg-accel-ops.h | 1 + accel/tcg/tcg-accel-ops-mttcg.c | 3 +-- accel/tcg/tcg-accel-ops-rr.c | 3 +-- accel/tcg/tcg-accel-ops.c | 7 +++++++ 4 files changed, 10 insertions(+), 4 deletions(-) diff --git a/accel/tcg/tcg-accel-ops.h b/accel/tcg/tcg-accel-ops.h index 6feeb3f3e9b..129af89c3e7 100644 --- a/accel/tcg/tcg-accel-ops.h +++ b/accel/tcg/tcg-accel-ops.h @@ -14,6 +14,7 @@ #include "system/cpus.h" +void tcg_vcpu_thread_precreate(CPUState *cpu); void tcg_cpu_destroy(CPUState *cpu); int tcg_cpu_exec(CPUState *cpu); void tcg_handle_interrupt(CPUState *cpu, int mask); diff --git a/accel/tcg/tcg-accel-ops-mttcg.c b/accel/tcg/tcg-accel-ops-mttcg.c index dfcee30947e..462be7596b9 100644 --- a/accel/tcg/tcg-accel-ops-mttcg.c +++ b/accel/tcg/tcg-accel-ops-mttcg.c @@ -133,8 +133,7 @@ void mttcg_start_vcpu_thread(CPUState *cpu) { char thread_name[VCPU_THREAD_NAME_SIZE]; - g_assert(tcg_enabled()); - tcg_cpu_init_cflags(cpu, current_machine->smp.max_cpus > 1); + tcg_vcpu_thread_precreate(cpu); /* create a thread per vCPU with TCG (MTTCG) */ snprintf(thread_name, VCPU_THREAD_NAME_SIZE, "CPU %d/TCG", diff --git a/accel/tcg/tcg-accel-ops-rr.c b/accel/tcg/tcg-accel-ops-rr.c index 6eec5c9eee9..fc33a13e4e8 100644 --- a/accel/tcg/tcg-accel-ops-rr.c +++ b/accel/tcg/tcg-accel-ops-rr.c @@ -311,8 +311,7 @@ void rr_start_vcpu_thread(CPUState *cpu) static QemuCond *single_tcg_halt_cond; static QemuThread *single_tcg_cpu_thread; - g_assert(tcg_enabled()); - tcg_cpu_init_cflags(cpu, false); + tcg_vcpu_thread_precreate(cpu); if (!single_tcg_cpu_thread) { single_tcg_halt_cond = cpu->halt_cond; diff --git a/accel/tcg/tcg-accel-ops.c b/accel/tcg/tcg-accel-ops.c index 95ff451c148..861996649b7 100644 --- a/accel/tcg/tcg-accel-ops.c +++ b/accel/tcg/tcg-accel-ops.c @@ -41,6 +41,7 @@ #include "gdbstub/enums.h" #include "hw/core/cpu.h" +#include "hw/boards.h" #include "tcg-accel-ops.h" #include "tcg-accel-ops-mttcg.h" @@ -69,6 +70,12 @@ void tcg_cpu_init_cflags(CPUState *cpu, bool parallel) tcg_cflags_set(cpu, cflags); } +void tcg_vcpu_thread_precreate(CPUState *cpu) +{ + g_assert(tcg_enabled()); + tcg_cpu_init_cflags(cpu, current_machine->smp.max_cpus > 1); +} + void tcg_cpu_destroy(CPUState *cpu) { cpu_thread_signal_destroyed(cpu);