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[RFC,RESEND,23/42] target/arm: Implement SysemuCPUOps::can_accelerate() handler

Message ID 20250620172751.94231-24-philmd@linaro.org
State New
Headers show
Series accel/split/arm: Run EL2 using TCG and EL1/EL0 in hardware with HVF | expand

Commit Message

Philippe Mathieu-Daudé June 20, 2025, 5:27 p.m. UTC 
ARM hardware can only accelerate EL0 and EL1.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 target/arm/cpu.c | 8 ++++++++
 1 file changed, 8 insertions(+)

Comments

Richard Henderson June 22, 2025, 3:03 a.m. UTC | #1 
On 6/20/25 10:27, Philippe Mathieu-Daudé wrote:
> ARM hardware can only accelerate EL0 and EL1.
> 
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
>   target/arm/cpu.c | 8 ++++++++
>   1 file changed, 8 insertions(+)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~
diff mbox series

Patch

diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index ab5fbd9b40b..1a19e5cfb45 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -149,6 +149,13 @@  static bool arm_cpu_has_work(CPUState *cs)
          | CPU_INTERRUPT_VFIQ | CPU_INTERRUPT_VIRQ | CPU_INTERRUPT_VSERR
          | CPU_INTERRUPT_EXITTB);
 }
+
+static bool arm_cpu_can_accelerate(CPUState *cs)
+{
+    CPUARMState *env = cpu_env(cs);
+
+    return arm_current_el(env) < 2;
+}
 #endif /* !CONFIG_USER_ONLY */
 
 void arm_register_pre_el_change_hook(ARMCPU *cpu, ARMELChangeHookFn *hook,
@@ -2695,6 +2702,7 @@  static vaddr aarch64_untagged_addr(CPUState *cs, vaddr x)
 
 static const struct SysemuCPUOps arm_sysemu_ops = {
     .has_work = arm_cpu_has_work,
+    .can_accelerate = arm_cpu_can_accelerate,
     .get_phys_page_attrs_debug = arm_cpu_get_phys_page_attrs_debug,
     .asidx_from_attrs = arm_asidx_from_attrs,
     .write_elf32_note = arm_cpu_write_elf32_note,