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[95.127.63.101]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3a6d11881basm2556550f8f.72.2025.06.20.10.28.17 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 20 Jun 2025 10:28:19 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Alexander Graf , =?utf-8?q?Alex_Benn=C3=A9e?= , Richard Henderson , Paolo Bonzini , Peter Maydell , Julian Armistead , Cameron Esfahani , Mark Burton , Thomas Huth , "Edgar E. Iglesias" , Pierrick Bouvier , =?utf-8?q?Philippe_Mathieu-?= =?utf-8?q?Daud=C3=A9?= Subject: [RFC PATCH RESEND 03/42] accel/split: Implement cpus_are_resettable() Date: Fri, 20 Jun 2025 19:27:11 +0200 Message-ID: <20250620172751.94231-4-philmd@linaro.org> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250620172751.94231-1-philmd@linaro.org> References: <20250620172751.94231-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::430; envelope-from=philmd@linaro.org; helo=mail-wr1-x430.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- accel/split/split-all.c | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/accel/split/split-all.c b/accel/split/split-all.c index 6bc95c7a7c8..c86d0e8583a 100644 --- a/accel/split/split-all.c +++ b/accel/split/split-all.c @@ -30,7 +30,18 @@ static bool split_has_memory(MachineState *ms, AddressSpace *as, static bool split_cpus_are_resettable(AccelState *as) { - g_assert_not_reached(); + SplitAccelState *sas = SPLIT_ACCEL(as); + AccelClass *hwc = ACCEL_GET_CLASS(sas->hw); + AccelClass *swc = ACCEL_GET_CLASS(sas->sw); + bool rv = false; + + if (hwc->cpus_are_resettable) { + rv |= hwc->cpus_are_resettable(sas->hw); + } + if (swc->cpus_are_resettable) { + rv |= swc->cpus_are_resettable(sas->sw); + } + return rv; } static bool split_supports_guest_debug(AccelState *as)